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| [AK4612] ms1039-j-01 2009/06 - 1 - ? a AK4612 x 6ch adc q 8ch dac ? o b? 24bit codec pb{ adc tx????~?????? m?>;z dac tx????~?????m?>;`om?b{ AK4612 x3????? ??z) ? ??w?mt 0 `os?z?3???3a??|???|???3a sr
??m??-?3??t &;pv?b{ 80 e? lqfp ?-?t? ^?z, x???_ n`?b{ ? ? 1. 6ch 24bit adc - 128 |????? - ? ???????? o - 3????? ???) ? ?? 0 - 3????? ??z) ? ????????3?????? o - adc s/(n+d) 92db: 3????? ?? 97db: ) ? ?? - adc dr, s/n 103db: 3????? ?? 104db: ) ? ?? - |???????;???? hpf - i/f ???? : 2g? , i 2 s, tdm - |?????? 2. 8ch 24bit dac - 128 |????? - 24 ??? 8 ???????? - 3????? z??) ? z? 0 - 3????? z???????? o - dac s/(n+d) 94db: 3????? z? 100db: ) ? z? - dac dr, s/n 105db: 3????? z? 108db: ) ? z? - ??? ?q??????? o (256 ?? , 0.5db a? ) - 1????? - ?????3 o (32khz, 44.1khz, 48khz 0 ) - i/f ???? : 2g? , ?g? (16bit,20bit,24bit),i 2 s, tdm - ?u z; 3. ???? * t : - normal speed mode: 32khz to 48khz - double speed mode: 64khz to 96khz - quad speed mode: 128khz to 192khz 4. ? / ?t?? 6 / 8-channel audio codec AK4612 [AK4612] ms1039-j-01 2009/06 - 2 - 5. ???? - ?t?? : 256fs,384fs or 512fs (normal speed mode: fs=32khz 48khz) 256fs (double speed mode: fs=64khz 96khz) 128fs (quad speed mode: fs=128khz 192khz) - ?t?? : 256fs or 512fs (normal speed mode: fs=32khz 48khz) 256fs (double speed mode: fs=64khz 96khz) 128fs (quad speed mode: fs=128khz 192khz) 6. p ????? : 4 3??? / i 2 c (ver 1.0, 400khz t?? ) 7. ?o ?y - ??? ?o : avdd1, avdd2 = 3.0 3.6v - ???? ?o : dvdd = 1.6 2.0v - ? z???? ?o : tvdd1, tvdd2 = 1.6 3.6v 8. ? ? ?v : 98ma (fs=48khz) 9. ta = -20 ~ 85 o c (AK4612eq), - 40 105 o c (AK4612vq) 10. ?-? : 80 e? lqfp(0.5mm pitch) [AK4612] ms1039-j-01 2009/06 - 3 - ?? $ audio i/f scf1 lout1+ / lout1 dac1 datt1 dem1 adc3 hpf3 adc3 hpf3 lrc k bick sdti1 sdti2 sdti3 mclk lr ck bick sdout1 sd in1 sd in2 sd in3 sdto1 sdti4 sd in4 dac1 datt1 dem1 dac2 datt2 dem2 dac2 datt2 dem2 dac3 datt3 dem3 dac3 datt3 dem3 dac4 datt4 dem4 dac4 datt4 dem4 lout1- adc2 hpf2 adc2 hpf2 adc1 hpf1 adc1 hpf1 lin1+ / lin1 lin1- sdout2 sdout3 ts t7 ts t8 sdto2 sdto3 up i/f i2c csn ccl k / scl cdti / sda cdto cad1 cad0 mcko xto xti / mc ki divider x?tal oscillation rin1+ / rin1 rin1- lin2+ / lin2 lin2- rin2+ / rin2 rin2- lin3+ / lin3 lin3- rin3+ / rin3 rin3- scf1 rout1+ / rout1 rout1- scf2 lout2+ / lout2 lout2- scf2 rout2+ / rout2 rout2- scf3 lout3+ / lout3 lout3- scf3 rout3- scf4 lout4+ / lout4 lout4- scf4 rout4+ / rout4 rout4- pdn m/s ts t2 ts t1 ts t4 ts t3 ovf1 / dzf1 ovf2 / dzf2 vcom a vdd1 vrefh 1 vrefh 2 vss1 a vd d2 vss2 dvdd vss3 tvdd1 vss4 tvdd2 tst5 dvmpd rout3+ / rout3 figure 1. ?? $ [AK4612] ms1039-j-01 2009/06 - 4 - |??????? AK4612eq -20 +85 c 80pin lqfp(0.5mm pitch) AK4612vq -40 +105 c 80pin lqfp(0.5mm pitch) akd4612 evaluation board for AK4612 e? ? (top view) 80 p in lqf p lout4+ / lout4 lout2+ / lout2 61 62 63 64 65 66 67 68 69 70 72 73 71 74 76 77 75 78 79 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 29 28 30 27 25 24 26 23 22 21 60 59 58 5 7 56 5 5 54 5 3 52 51 50 49 48 47 46 45 44 43 42 41 lout2- rout2+ / rout2 rout2- lout3+ / lout3 lout3- rout3+ / rout3 rout3- vss2 a vdd2 vrefh2 lout4- rout4+ / rout4 rout4- tst9 tst10 tst11 ts t12 tst13 tst14 rout1- rout1+ / rout1 tst4 tst5 cad0 lout1+ / lout1 dvmpd lout1- tst8 tst7 i2c cclk / scl cdti / sda cdto tst1 tst3 nc xto cad1 csn tvdd2 vss3 dvdd mcko m/s tst2 pdn sdti 4 sdti 3 sdti 2 bi ck lrck sdti 1 sdto3 sdto2 sdto1 vss4 tvdd1 xti / mcki tst1 5 tst1 6 ovf1 / dzf1 lin1- rin1+ / rin1 rin1- lin2+ / lin2 lin2- rin2+ / rin2 lin3+ / lin3 lin3- rin2- vss1 vrefh1 vcom rin3+ / rin3 rin3- ovf2 / dzf2 lin1+ / lin1 avdd1 figure 2. e? ? [AK4612] ms1039-j-01 2009/06 - 5 - ak4628 qw?? q 1. ; function ak4628 AK4612 number of adc channel 2-channel 6-channel number of dac channel 8-channel 8-channel input single single or diff output single single or diff i/f format i2s, lj, rj(20/24bit), tdm i2s, lj, rj(16/20/24bit), tdm tdm512 no fs=48khz xtal osc no yes parallel / serial select pin yes no control data output pin no yes ta -40 +85 c -40 +105 c package 44pinlqfp 80pinlqfp 2. ?o ?y voltage name ak4628 AK4612 avdd 4.5 5.5v no avdd1 no 3.0 3.6v avdd2 no 3.0 3.6v dvdd 4.5 5.5v 1.6 2.0v tvdd 2.7 5.5v no tvdd1 no 1.6 3.6v tvdd2 no 1.6 3.6v 3. ? q parameter ak4628 AK4612 fs (ad/da) 96k / 192k 192k / 192k thd+n (ad/da) single: 92 / 90 differential : - / - single: 92 / 94 differential : 97 / 100 s/n (ad/da) single: 102 / 106 differential : - / - single: 103 / 105 differential: 104 / 108 output datt 128 level 256 level ? p i/f 100k i2c, 3wire 400k i2c, 4wire [AK4612] ms1039-j-01 2009/06 - 6 - e??; no. pin name i/o function 1 tst1 i test pin this pin must be connected to vss4. 2 tst3 i test pin this pin must be connected to vss4. 3 tst4 i test pin this pin must be connected to tvdd2. 4 tst5 i test pin this pin must be connected to vss4. 5 cad0 i chip address 0 pin 6 cad1 i chip address 1 pin 7 i2c i p i/f mode select pin ?l?: 4-wire serial, ?h?: i 2 c bus cclk i control data clock pin in serial control mode i2c = ?l?: cclk (4-wire serial) 8 scl i control data clock pin in serial control mode i2c = ?h?: scl (i 2 c bus) 9 csn i chip select pin in 4-wire serial control mode this pin must be connected to tvdd2 at i 2 c bus control mode cdti i control data input pin in serial control mode i2c = ?l?: cdti (4-wire serial) 10 sda i/o control data input pin in serial control mode i2c = ?h?: sda (i 2 c bus) 11 cdto o control data output pin in 4-wire serial control mode 12 tvdd2 - input / output buffer power supply 1 pin, 1.6v 3.6v 13 vss3 ground pin, 0v 14 dvdd - digital power supply pin, 1.6v 2.0v 15 nc - no connection. no internal bonding. this pin must be connected to the ground. 16 tst2 i test pin this pin must be connected to vss4. 17 m/s i master mode select pin ?l?: slave mode ?h?: master mode 18 mcko o master clock output pin 19 pdn i power-down & reset pin when ?l?, the AK4612 is powered-down and the control registers are reset to default state. if the state of cad1-0 changes, then the AK4612 must be reset by pdn. 20 xto o x?tal output pin xti i x?tal input pin 21 mcki i external master clock input pin 22 tvdd1 - input / output buffer power supply 1 pin, 1.6v 3.6v 23 vss4 - digital ground pin, 0v 24 sdto1 o audio serial data output 1 pin 25 sdto2 o audio serial data output 2 pin 26 sdto3 o audio serial data output 3 pin 27 lrck i/o input /output channel clock pin 28 bick i/o audio serial data clock pin 29 sdti1 i audio serial data input 1 pin 30 sdti2 i audio serial data input 2 pin 31 sdti3 i audio serial data input 3 pin 32 sdti4 i audio serial data input 4 pin 33 tst7 i test pin this pin must be connected to vss4. 34 tst8 i test pin this pin must be connected to vss4. [AK4612] ms1039-j-01 2009/06 - 7 - no. pin name i/o function 35 dvmpd i dac output vcom voltage power down pin ?l?: dac outputs are vcom voltage ?h?: dac outputs are hi-z. lout1+ o lch analog positive output 1 pin (doe1 bit = ?h?) 36 lout1 o lch analog output 1 pin (doe1 bit = ?l?) 37 lout1- o lch analog negative output 1 pin (when doe1 bit = ?l?, this pin must be open.) rout1+ o rch analog positive output 1 pin (doe1 bit = ?h?) 38 rout1 o rch analog output 1 pin (doe1 bit = ?l?) 39 rout1- o rch analog negative output 1 pin (when doe1 bit = ?l?, this pin must be open.) lout2+ o lch analog positive output 2 pin (doe2 bit = ?h?) 40 lout2 o lch analog output 2 pin (doe2 bit = ?l?) 41 lout2- o lch analog negative output 2 pin (when doe2 bit = ?l?, this pin must be open.) rout2+ o rch analog positive output 2 pin (doe2 bit = ?h?) 42 rout2 o rch analog output 2 pin (doe2 bit = ?l?) 43 rout2- o rch analog negative output 2 pin (when doe2 bit = ?l?, this pin must be open.) lout3+ o lch analog positive output 3 pin (doe3 bit = ?h?) 44 lout3 o lch analog output 3 pin (doe3 bit = ?l?) 45 lout3- o lch analog negative output 3 pin (when doe3 bit = ?l?, this pin must be open.) rout3+ o rch analog positive output 3 pin (doe3 bit = ?h?) 46 rout3 o rch analog output 3 pin (doe3 bit = ?l?) 47 rout3- o rch analog negative output 3 pin (when doe3 bit = ?l?, this pin must be open.) 48 vss2 - ground pin, 0v 49 avdd2 - analog power supply pin, 3.0v 3.6v 50 vrefh2 i positive voltage reference input pin, avdd2 lout4+ o lch analog positive output 4 pin (doe4 bit = ?h?) 51 lout4 o lch analog output 4 pin (doe4 bit = ?l?) 52 lout4- o lch analog negative output 4 pin (when doe4 bit = ?l?, this pin must be open.) rout4+ o rch analog positive output 4 pin (doe4 bit = ?h?) 53 rout4 o rch analog output 4 pin (doe4 bit = ?l?) 54 rout4- o rch analog negative output 4 pin (when doe4 bit = ?l?, this pin must be open.) 55 tst9 o test pin this pin must be open. 56 tst10 o test pin this pin must be open. 57 tst11 o test pin this pin must be open. 58 tst12 o test pin this pin must be open. 59 tst13 o test pin this pin must be open. 60 tst14 o test pin this pin must be open. 61 tst15 o test pin this pin must be open. 62 tst16 o test pin this pin must be open. ovf1 o analog input overflow detect 1 pin ( note 1 ) this pin goes to ?h? if the analog input of lch or rch overflows. 63 dzf1 o zero input detect 1 pin ( note 2 ) when the input data of the group 1 follow total 8192 lrck cycles with ?0? input data, this pin goes to ?h?. and when rstn bit is ?0 ?, pmdac bit is ?0?, this pin goes to ?h?. ovf2 o analog input overflow detect 2 pin ( note 1 ) this pin goes to ?h? if the analog input of lch or rch overflows. 64 dzf2 o zero input detect 2 pin ( note 2 ) when the input data of the group 2 follow total 8192 lrck cycles with ?0? input data, this pin goes to ?h?. and when rstn bit is ?0?, pmdac bit is ?0?, this pin goes to ?h?. [AK4612] ms1039-j-01 2009/06 - 8 - no. pin name i/o function lin1+ i lch analog positive i nput 1 pin (die1 bit = ?h?) 65 lin1 i lch analog input 1 pin (die1 bit = ?l?) 66 lin1- - lch analog negative input 1 pin (when die1 bit = ?l?, this pin must be open.) ( note 3 ) rch analog positive input 1 pin (die1 bit = ?h?) 67 rin1+ rin1 i i rch analog input 1 pin (die1 bit = ?l?) 68 rin1- - rch analog negative input 1 pin (when die1 bit = ?l?, this pin must be open.) ( note 3 ) lin2+ i lch analog positive i nput 2 pin (die2 bit = ?h?) 69 lin2 i lch analog input 2 pin (die2 bit = ?l?) 70 lin2- - lch analog negative input 2 pin (when die2 bit = ?l?, this pin must be open.) ( note 3 ) rin2+ i rch analog positive i nput 2 pin (die2 bit = ?h?) 71 rin2 i rch analog input 2 pin (die2 bit = ?l?) 72 rin2- - rch analog negative input 2 pin (when die2 bit = ?l?, this pin must be open.) ( note 3 ) lin3+ i lch analog positive i nput 3 pin (die3 bit = ?h?) 73 lin3 i lch analog input 3 pin (die3 bit = ?l?) 74 lin3- - lch analog negative input 3 pin (when die3 bit = ?l?, this pin must be open.) ( note 3 ) 75 vss1 - ground pin, 0v 76 avdd1 - analog power supply pin, 3.0v 3.6v 77 vrefh1 i positive voltage reference input pin, avdd1 78 vcom o common voltage output pin, avdd1x1/2 large external capacitor around 2.2f is used to reduce power-supply noise. rin3+ i rch analog positive i nput 3 pin (die3 bit = ?h?) 79 rin3 i rch analog input 3 pin (die3 bit = ?l?) 80 rin3- - rch analog negative input 3 pin (when die3 bit = ?l?, this pin must be open.) ( note 3 ) note 1. \we?x ovfe bit ? ?1? t ? b?qz ovf pin ts??b{ note 2. \we?x ovfe bit ? ?0? t ? b?qz dzf pin ts??b{ note 3. \we?x) ? ??tx - ?? z?q`o ?^`z single-end ??tx + z?? ??`h ??w s 8 z?q`o ?^b?wp single-end ??x open t`oxi^m{ note 4. ?ow???? ??e?x??a???t`smp<^m{ [AK4612] ms1039-j-01 2009/06 - 9 - ? 07 g (vss1=vss2=vss3=vss4 =0v; note 5 ) parameter symbol min max units power supplies analog digital output buffer avdd1,2 dvdd tvdd1,2 -0.3 -0.3 -0.3 4.2 2.2 4.2 v v v input current (any pins except for supplies) iin - 10 ma analog input voltage vina -0.3 avdd1,2+0.3 v digital input voltage (tst2,m/s,pdn,xti/mcki,lrck,bick, sdti1,sdti2,sdti3,sdti4,sdti5,sdti6, dvmpd pins) (tst1,tst3,tst4,tst5,cad0,cad1,i2c, cclk/scl,csn,cdti/sda pins) vind1 vind2 -0.3 -0.3 tvdd1+0.3 tvdd2+0.3 v v AK4612eq ta -20 85 c ambient temperature (power applied) AK4612vq ta -40 105 c storage temperature tstg -65 150 c note 5. ?yxb?o????t 0b? ?pb{ vss1,vss2,vss3,vss4 x???????t ? `o<^ m{ avdd1,avdd2 x ?a ?ot ? `oxi^m{ ?? : \w ?? qh ep?;`h ?z??? ub?\quk??b{ ?h w ?^x- a^??d?{ * ? ?^ e (vss1=vss2=vss3=vss4 =0v; note 5 ) parameter symbol min typ max units power supplies ( note 6 ) analog digital i/o buffer 1 (stereo mode & normal speed mode) i/o buffer 1 (except stereo mode & normal speed mode) i/o buffer 2 avdd1,2 dvdd tvdd1 tvdd1 tvdd2 3.0 1.6 dvdd 3.0 dvdd 3.3 1.8 3.3 3.3 3.3 3.6 2.0 3.6 3.6 3.6 v v v v v note 6. avdd1, avdd2, dvdd, tvdd1, tvdd2 wqj [3?-???q? ?axk??d?{ ?ox pdn pin = l l z w y 6pqj [z ?ow ?ouqj ulh?z pdn pin = l h z q`oxi^m{? hz AK4612 px ?ow ?o? on `oxi^m{ ?w ?ow? off b?\qxpv?d?{ ?o off qx ?o?????q ? ??tb?tzk?mx??a???tb?\qpb{ i2c q ? `o?o ?z *%??u ?o on w y 6p AK4612 w?? off t`smpxi^ m{ ?? : ????3??tgl^?om? e??w]?;t`oxz ptpx y ?mtv?bwp g ] ??<^m{ [AK4612] ms1039-j-01 2009/06 - 10 - ??? ? q (ta=25 c; avdd1=avdd2=tvdd1=tvdd2=3.3v, dvdd =1.8v; vss1=vss2=vss3=vss4=0v; vrefh1=avdd1, vrefh2=avdd2; fs=48khz; bick=64fs; signal frequency=1khz; 24bit data; measurement frequency=20hz 20khz at 48khz, 20hz~40khz at fs=96khz, 20hz~4 0khz at fs=192khz; unless otherwise specified) parameter min typ max units adc analog input characteristics (single inputs) resolution 24 bits -1dbfs 84 92 db fs=48khz bw=20khz -60dbfs 40 -1dbfs 83 91 db fs=96khz bw=40khz -60dbfs 37 -1dbfs 91 s/(n+d) fs=192khz bw=40khz -60dbfs 37 dr (-60dbfs with a-weighted) 95 103 db s/n (a-weighted) 95 103 db interchannel isolation 90 110 db interchannel gain mismatch 0.1 0.5 db gain drift 40 - ppm/ c input voltage ain=0.65xvrefh1 1.94 2.15 2.37 vpp input resistance 7 9 k power supply rejection ( note 7 ) 50 db adc analog input characteristics (differential inputs) -1dbfs 88 97 db fs=48khz bw=20khz -60dbfs 40 db -1dbfs 86 94 fs=96khz bw=40khz -60dbfs 37 -1dbfs 94 s/(n+d) fs=192khz bw=40khz -60dbfs 37 dr (-60dbfs with a-weighted) 96 104 db s/n (a-weighted) 96 104 db interchannel isolation 90 110 db interchannel gain mismatch 0.1 0.5 db gain drift 40 - ppm/ c input voltage ain=0.65xvrefh1 ( note 8 ) 1.94 2.15 2.37 vpp input resistance 11 13 k power supply rejection ( note 7 ) 50 db common mode rejection ratio (cmrr) ( note 9 ) 74 db dac analog output characteristics (single outputs) resolution 24 bits 0dbfs 84 94 db fs=48khz bw=20khz -60dbfs 44 0dbfs 82 92 fs=96khz bw=40khz -60dbfs 41 0dbfs 92 s/(n+d) fs=192khz bw=40khz -60dbfs 41 dr (-60dbfs with a-weighted) 97 105 db s/n (a-weighted) 97 105 db interchannel isolation 90 110 db interchannel gain mismatch 0.1 0.5 db gain drift 20 - ppm/ c output voltage aout=0.63xvrefh2 1.87 2.08 2.29 vpp load resistance (ac ?y ) 5 k load capacitance 30 pf power supply rejection ( note 7 ) 50 db [AK4612] ms1039-j-01 2009/06 - 11 - dac analog output characteri stics (differential outputs) 0dbfs 90 100 db fs=48khz bw=20khz -60dbfs 45 0dbfs 88 98 fs=96khz bw=40khz -60dbfs 42 0dbfs 98 s/(n+d) fs=192khz bw=40khz -60dbfs 42 dr (-60dbfs with a-weighted) 100 108 db s/n (a-weighted) 100 108 db interchannel isolation 90 110 db interchannel gain mismatch 0 0.5 db gain drift 20 - ppm/ c output voltage aout=0.63xvrefh2 ( note 8 ) 1.87 2.15 2.29 vpp load resistance ( note 10 ) 2 k load capacitance ( note 11 ) 30 pf power supply rejection ( note 7 ) 50 db note 7. vrefh1,vrefh2 ? +3.3v t{ `oz avdd1, avdd2, dvdd, tvdd1,tvdd2 t 1khz, 50mvpp w ym t? o t`h ?{ note 8. (lin+) ? (lin-) t| (rin+) ? (rin-) w ?pb{ vrefh1, vrefh2 w ?yt z?`?b{ note 9. vrefh1,vrefh2 ? +3.3v t{ `oz lin+(rin+) q lin-(rin-) t ? p avdd1,2x1/2 0.96vpp,1khz w ym t? ??`h ?{ cmrr w x 0db=-7dbfs(0.96vpp=-7dbfs) q`hqvwn 0??? `?b{ note 10. ac ?yt 0`o{ dc ?yw ?x 5k { note 11. z?e? 0 gnd w load capacitance ?f `om?b{) ? ??x0? $ ?yu 2 qs?wp) ?w0? ?yx 2 q`o?q? ?auk??b{ parameter min typ max units power supplies power supply current normal operation (pdn pin = ?h?) avdd1+avdd2 fs=48khz, 96khz, 192khz dvdd fs=48khz fs=96khz fs=192khz tvdd1+tvdd2 fs=48khz fs=96khz fs=192khz power-down mode (pdn pin = ?l?, dvmpd = ? l?) ( note 12 ) avdd1+avdd2+dvdd+tvdd1+tvdd2 (pdn pin = ?l?, dvmpd = ? h?) ( note 12 ) avdd1+avdd2+dvdd+tvdd1+tvdd2 76.0 16.0 22.0 35.0 6.0 7.0 7.0 200 10 125.0 24.0 35.0 55.0 8.0 9.5 9.5 550 200 ma ma ma ma ma ma ma a a note 12. i-{????? ?ow???? ??e?? vss3 (tst1, tst3, tst4, tst5, cad0, cad1, i2c, csn, cclk, cdti pins), vss4 (tst2, m/ s, mcki, lrck, bick, sd ti1, sdti2, sdti3, sdti4,sdti5, sdti6) t{ `h ?w ?pb{ [AK4612] ms1039-j-01 2009/06 - 12 - ???? ? q (fs=48khz) ( ta= tmin tmax; avdd1=avdd2=3.0 3.6v, dvdd=1.6 2.0v, tvdd1=tvdd2=1.6 3.6v; dem=off) parameter symbol min typ max units adc digital filter (decimation lpf): passband ( note 13 ) 0.1db ? 0.2db ? 3.0db pb 0 - - - 20.0 23.0 18.9 - - khz khz khz stopband ( note 13 ) sb 28 - - khz passband ripple pr - - 0.1 db stopband attenuation sa 68 - - db group delay distortion gd - 0 - s group delay ( note 14 ) gd - 16 - 1/fs adc digital filter (hpf): frequency response ( note 13 ) ? 3db ? 0.1db fr - - 1.0 6.5 - - hz hz dac digital filter (lpf): passband ( note 13 ) 0.06db ? 6.0db pb 0 - - 24.0 21.8 - khz khz stopband ( note 13 ) sb 26.2 - - khz passband ripple pr - - 0.06 db stopband attenuation sa 54 - - db group delay distortion gd - 0 - s group delay ( note 14 ) gd - 22 - 1/fs dac digital filter + analog filter: frequency response ( note 15 ) 20khz fr - -0.1 - db ???? ? q (fs=96khz) ( ta= tmin tmax; avdd1=avdd2=3.0 3.6v, dvdd=1.6 2.0v, tvdd1=tvdd2=1.6 3.6v; dem=off) parameter symbol min typ max units adc digital filter (decimation lpf): passband ( note 13 ) 0.1db ? 0.2db ? 3.0db pb 0 - - - 40.0 46.0 37.8 - - khz khz khz stopband ( note 13 ) sb 56 - - khz passband ripple pr - - 0.1 db stopband attenuation sa 68 - - db group delay distortion gd - 0 - s group delay ( note 14 ) gd - 16 - 1/fs adc digital filter (hpf): frequency response ( note 13 ) ? 3db ? 0.1db fr - - 2.0 13.0 - - hz hz dac digital filter (lpf): passband ( note 13 ) 0.06db ? 6.0db pb 0 - - 48.0 43.6 - khz khz stopband ( note 13 ) sb 52.4 - - khz passband ripple pr - - 0.06 db stopband attenuation sa 54 - - db group delay distortion gd - 0 - s group delay ( note 14 ) gd - 22 - 1/fs dac digital filter + analog filter: frequency response ( note 15 ) 40khz fr - -0.3 - db [AK4612] ms1039-j-01 2009/06 - 13 - ???? ? q (fs=192khz) ( ta= tmin tmax; avdd1=avdd2=3.0 3.6v, dvdd=1.6 2.0v, tvdd1=tvdd2=1.6 3.6v; dem=off) parameter symbol min typ max units adc digital filter (decimation lpf): passband ( note 13 ) 0.1db ? 0.2db ? 3.0db pb 0 - - - 57.0 90.3 56.6 - - khz khz khz stopband ( note 13 ) sb 112 - - khz passband ripple pr - - 0.1 db stopband attenuation sa 70 - - db group delay distortion gd - 0 - s group delay ( note 14 ) gd - 16 - 1/fs adc digital filter (hpf): frequency response ( note 13 ) ? 3db ? 0.1db fr - - 4.0 26.0 - - hz hz dac digital filter (lpf): passband ( note 13 ) 0.06db ? 6.0db pb 0 - - 96.0 87.0 - khz khz stopband ( note 13 ) sb 104.9 - - khz passband ripple pr - - 0.06 db stopband attenuation sa 54 - - db group delay distortion gd - 0 - s group delay ( note 14 ) gd - 22 - 1/fs dac digital filter + analog filter: frequency response ( note 15 ) 80khz fr - -1 - db note 13. ? ? qw * t :x fs ( 3a?????? ) t z?`?b{?qyz fs=48khz w ? adc w 0.1db tsz? passband 0.39375 fs pb{ dac w 0.06db tsz? passband x 0.45412 x fs pb{ note 14. ????????t?? ? ?pz??? ??u ??^?ot?????w 24bit ???u adc z??t??^???pwpb{ dac ?x 24bit ???u ???t??^ ?ot???? ??u z?^???pwpb{ note 15. 1khz ?, jt`h ?pb{ [AK4612] ms1039-j-01 2009/06 - 14 - dc ? q (ta= tmin tmax; avdd1=avdd2=3.0 3.6; dvdd=1.6 2.0v; tvdd1=tvdd2=1.6 3.6v) parameter symbol min typ max units tvdd1,tvdd2 2.2v high-level input voltage (tst2, m/s, pdn, xti/mcki, lrck, bick, sdti1, sdti2, sdti3, sdti4, tst7, tst8, dvmpd pins) (tst1,tst3,tst4,tst5,cad0,cad1,i2c, cclk/scl, csn, cdti/sda pins) low-level input voltage (tst2, m/s, pdn, xti/mcki, lrck, bick, sdti1, sdti2, sdti3, sdti4, tst7, tst8, dvmpd pins) (tst1,tst3,tst4,tst5,cad0,cad1,i2c, cclk/scl, csn, cdti/sda pins) vih vih vil vil 80%tvdd1 80%tvdd2 - - - - - - - - 20%tvdd1 20%tvdd2 v v v v tvdd1,tvdd2 > 2.2v high-level input voltage (tst2, m/s, pdn, xti/mcki, lrck, bick, sdti1, sdti2, sdti3, sdti4, tst7, tst8, dvmpd pins) (tst1,tst3,tst4,tst5,cad0,cad1,i2c, cclk/scl, csn, cdti/sda pins) low-level input voltage (tst2, m/s, pdn, xti/mcki, lrck, bick, sdti1, sdti2, sdti3, sdti4, tst7, tst8, dvmpd pins) (tst1,tst3,tst4,tst5,cad0,cad1,i2c, cclk/scl, csn, cdti/sda pins) vih vih vil vil 70%tvdd1 70%tvdd2 - - - - - - - - 30%tvdd1 30%tvdd2 v v v v high-level output voltage (sdto1,sdto2,sdto3, lrck, bick, mcko pins: iout=-100a) (cdto pin: iout=-100a) (dzf1/ovf1, dzf2/ovf2 pins: iout=-100a) low-level output voltage (sdto1,sdto2,sdto3, lrck, bick, mcko, cdto, dzf1/ovf1, dzf2/ovf2 pins: iout= 100a) (sda pin, 2.0v tvdd2 3.6v iout= 3ma) (sda pin, 1.6v tvdd2 < 2.0v iout= 3ma) voh voh vol vol vol tvdd1-0.5 tvdd2-0.5 avdd2-0.5 - - - - - - - - - - - 0.5 0.4 20%tvdd2 v v v v v v input leakage current iin - - 10 a [AK4612] ms1039-j-01 2009/06 - 15 - ????? ? q (ta= tmin tmax; avdd1=avdd2=3.0 3.6; dvdd=1.6 2.0v; tvdd1=1.6 3.6v, tvdd2=1.6 3.6v; c l =20pf; unless otherwise specified) parameter symbol min typ max units master clock timing crystal resonator frequency fxtal 11.2896 24.576 mhz mcko output frequency (tvdd1 3.0v) duty cycle fmck dmck 5.6448 40 50 24.576 60 mhz % external clock 256fsn: pulse width low pulse width high 384fsn: pulse width low pulse width high 512fsn, 256fsd, 128fsq: pulse width low pulse width high fclk tclkl tclkh fclk tclkl tclkh fclk tclkl tclkh 8.192 32 32 12.288 22 22 16.384 16 16 12.288 18.432 24.576 mhz ns ns mhz ns ns mhz ns ns mcko output frequency (tvdd1 3.0v) duty cycle ( note 16 ) fmck fmck dmck 4.096 12.288 40 50 12.288 24.576 60 mhz mhz % lrck timing (slave mode) stereo mode (tdm0 bit = ?0?, tdm1 bit = ?0?) normal speed mode double speed mode quad speed mode duty cycle fsn fsd fsq duty 32 64 128 45 48 96 192 55 khz khz khz % tdm512 mode ( note 17 ) (tdm0 bit = ?0?, tdm1 bit = ?1?) lrck frequency ?h? time ?l? time fsn tlrh tlrl 32 1/512fs 1/512fs 48 khz ns ns tdm256 mode ( note 18 ) (tdm0 bit = ?1?, tdm1 bit = ?0?) lrck frequency ?h? time ?l? time fsd tlrh tlrl 64 1/256fs 1/256fs 96 khz ns ns tdm128 mode ( note 19 ) (tdm0 bit = ?1?, tdm1 bit = ?1?) lrck frequency ?h? time ?l? time fsq tlrh tlrl 128 1/128fs 1/128fs 192 khz ns ns [AK4612] ms1039-j-01 2009/06 - 16 - parameter symbol min typ max units lrck timing (master mode) stereo mode (tdm0 bit = ?0?, tdm1 bit = ?0?) normal speed mode double speed mode quad speed mode duty cycle fsn fsd fsq dlrk 32 64 128 - 50 48 96 192 - khz khz khz % tdm512 mode ( note 17 ) (tdm0 bit = ?0?, tdm1 bit = ?1?) lrck frequency ?h? time ( note 20 ) fsn tlrh 32 1/16fs 48 khz ns tdm256 mode ( note 18 ) (tdm0 bit = ?1?, tdm1 bit = ?0?) lrck frequency ?h? time ( note 20 ) fsd tlrh 64 1/8fs 96 khz ns tdm128 mode ( note 19 ) (tdm0 bit = ?1?, tdm1 bit = ?1?) lrck frequency ?h? time ( note 20 ) fsq tlrh 128 1/4fs 192 khz ns note 16. div bit = ?0? w ?? ?v?b{ note 17. normal speed mode p?;`oxi^m{ master mode z master clock x 512fs ? ??`oxi^m{ note 18. double speed mode p?;`oxi^m{ note 19. quad speed mode p?;`oxi^m{ note 20. i 2 s ????x ?l? time [AK4612] ms1039-j-01 2009/06 - 17 - parameter symbol min typ max units audio interface timing (slave mode) stereo mode (tdm0 bit = ?0?, tdm1 bit = ?0?) (tvdd1= 1.6v 3.6v) bick period bick pulse width low pulse width high lrck edge to bick ? ? ( note 21 ) bick ? ? to lrck edge ( note 21 ) lrck to sdto(msb) (except i 2 s mode) bick ? ? to sdto sdti hold time sdti setup time tbck tbckl tbckh tlrb tblr tlrs tbsd tsdh tsds 324 130 130 20 20 50 50 80 80 ns ns ns ns ns ns ns ns ns (tvdd1= 3.0v 3.6v) bick period bick pulse width low pulse width high lrck edge to bick ? ? ( note 21 ) bick ? ? to lrck edge ( note 21 ) lrck to sdto(msb) (except i 2 s mode) bick ? ? to sdto sdti hold time sdti setup time tbck tbckl tbckh tlrb tblr tlrs tbsd tsdh tsds 81 33 33 23 23 10 10 23 23 ns ns ns ns ns ns ns ns ns tdm512 mode ( note 17 ) (tdm0 bit = ?0?, tdm1 bit = ?1?) (tvdd1= 3.0v 3.6v) bick period bick pulse width low pulse width high lrck edge to bick ? ? ( note 21 ) bick ? ? to lrck edge ( note 21 ) sdto setup time bick ? ? sdto hold time bick ? ? sdti hold time sdti setup time tbck tbckl tbckh tlrb tblr tbss tbsh tsdh tsds 40 16 16 10 10 6 5 10 10 ns ns ns ns ns ns ns ns ns ns tdm256 mode ( note 18 ) (tdm0 bit = ?1?, tdm1 bit = ?0?) (tvdd1= 3.0v 3.6v) bick period bick pulse width low pulse width high lrck edge to bick ? ? ( note 21 ) bick ? ? to lrck edge ( note 21 ) sdto setup time bick ? ? sdto hold time bick ? ? sdti hold time sdti setup time tbck tbckl tbckh tlrb tblr tbss tbsh tsdh tsds 40 16 16 10 10 6 5 10 10 ns ns ns ns ns ns ns ns ns tdm128 mode ( note 19 ) (tdm0 bit = ?1?, tdm1 bit = ?1?) (tvdd1= 3.0v 3.6v) bick period bick pulse width low pulse width high lrck edge to bick ? ? ( note 21 ) bick ? ? to lrck edge ( note 21 ) sdto setup time bick ? ? sdto hold time bick ? ? sdti hold time sdti setup time tbck tbckl tbckh tlrb tblr tbss tbsh tsdh tsds 40 16 16 10 10 6 5 10 10 ns ns ns ns ns ns ns ns ns [AK4612] ms1039-j-01 2009/06 - 18 - parameter symbol min typ max units audio interface timing (master mode) stereo mode (tdm0 bit = ?0?, tdm1 bit = ?0?) (tvdd1= 1.6v 3.6v) bick frequency bick duty bick ? ? to lrck bick ? ? to sdto sdti hold time sdti setup time fbck dbck tmblr tbsd tsdh tsds - - ? 40 ? 70 50 50 64fs 50 - - - - - - 40 70 - - hz % ns ns ns ns (tvdd1= 3.0v 3.6v) bick frequency bick duty bick ? ? to lrck bick ? ? to sdto sdti hold time sdti setup time fbck dbck tmblr tbsd tsdh tsds - - ? 23 ? 23 10 10 64fs 50 - - - - - - 23 23 - - hz % ns ns ns ns tdm512 mode ( note 17 ) (tdm0 bit = ?0?, tdm1 bit = ?1?) (tvdd1= 3.0v 3.6v) bick frequency bick duty bick ? ? to lrck sdto setup time bick ? ? sdto hold time bick ? ? sdti hold time sdti setup time fbck dbck tmblr tbss tbsh tsdh tsds - - -10 6 5 10 10 512fs 50 - - - - - - 10 - - - - hz % ns ns ns ns ns tdm256 mode ( note 18 ) (tdm0 bit = ?1?, tdm1 bit = ?0?) (tvdd1= 3.0v 3.6v) bick frequency bick duty bick ? ? to lrck sdto setup time bick ? ? sdto hold time bick ? ? sdti hold time sdti setup time fbck dbck tmblr tbss tbsh tsdh tsds - - ? 10 6 5 10 10 256fs 50 - - - - - - - 10 - - - - hz % ns ns ns ns ns tdm128 mode ( note 19 ) (tdm0 bit = ?1?, tdm1 bit = ?1?) (tvdd1= 3.0v 3.6v) bick frequency bick duty bick ? ? to lrck sdto setup time bick ? ? sdto hold time bick ? ? sdti hold time sdti setup time fbck dbck tmblr tbss tbsh tsdh tsds - - ? 10 6 5 10 10 128fs 50 - - - - - - - 10 - - - - hz % ns ns ns ns ns note 21. \wf ?x lrck w?q bick wqj u??u os?sm?otf `om?b{ [AK4612] ms1039-j-01 2009/06 - 19 - parameter symbol min typ max units control interface timing (4-wire serial mode): cclk period cclk pulse width low pulse width high cdti setup time cdti hold time csn ?h? time csn edge to cclk ? ? cclk ? ? to csn edge cdto delay csn ? ? to cdto hi-z tcck tcckl tcckh tcds tcdh tcsw tcss tcsh tdcd tccz 200 80 80 40 40 150 50 50 50 70 ns ns ns ns ns ns ns ns ns ns control interface timing (i 2 c bus mode): scl clock frequency bus free time between transmissions start condition hold time (prior to first clock pulse) clock low time clock high time setup time for repeated start condition sda hold time from scl falling ( note 22 ) sda setup time from scl rising rise time of both sda and scl lines fall time of both sda and scl lines setup time for stop condition pulse width of spike noise suppressed by input filter capacitive load on bus fscl tbuf thd:sta tlow thigh tsu:sta thd:dat tsu:dat tr tf tsu:sto tsp cb - 1.3 0.6 1.3 0.6 0.6 0 0.1 - - 0.6 0 - 400 - - - - - - - 1.0 0.3 - 50 400 khz s s s s s s s s s s ns pf power-down & reset timing pdn pulse width ( note 23 ) pdn ? ? to sdto valid ( note 24 ) tpd tpdv 150 518 ns 1/fs note 22. ???x7 ? 300ns(scl wqj<u? ) w-?^?sz?ys??d?{ note 23. ?o d ?x pdn pin ? ?l? tb?\qp???utt??b{ note 24. pdn pin ?qj [ot?w lrck wqj u?ws :pb{ note 25. i 2 c x philips semiconductors w j? ? apb{ [AK4612] ms1039-j-01 2009/06 - 20 - ????? t 1/fclk tclkl vih tclkh mcki vil 1/fsn, 1/fsd, 1/fsq lrck vih vil tbck tbckl vih tbckh bick vil tdlrkl tdlrkh duty = tdlrkh (or tdlrkl) x fs x 100 figure 3. ???????? (tdm1/0 bits = ?00? & slave mode) 1/fclk tclkl vih tclkh mcki vil 1/fs lrck vih vil tlrl tlrh tbck tbckl vih tbckh bick vil figure 4. ???????? (tdm1/0 bits = ?00? ?? & slave mode) [AK4612] ms1039-j-01 2009/06 - 21 - 1/fclk tclkl vih tclkh mcki vil 1/fmck 50%tvdd1 mcko tdmckl tdmckh dmck = tdmckh (or tdmckl) x fmck x 100 1/fbck tdbckl tdbckh bick 50%tvdd1 1/fs lrck 50%tvdd1 tdlrkl tdlrkh dlrk = tdlrkh (or tdlrkl) x fs x 100 dbck = tdbckh (or tdbckl) x fbclk x 100 figure 5. ???????? (tdm1/0 bits = ?00? & master mode) 1/fclk tclkl vih tclkh mcki vil 1/fmck 50%tvdd1 mcko tdmckl tdmckh dmck = tdmckh (or tdmckl) x fmck x 100 1/fs lrck 50%tvdd1 tlrh 1/fbck tdbckl tdbckh bick 50%tvdd1 dbck = tdbckh (or tdbckl) x fbclk x 100 figure 6. ???????? (tdm1/0 bits = ?00? ?? & master mode) [AK4612] ms1039-j-01 2009/06 - 22 - tlrb lrck vih bick vil tlrs sdto 50%tvdd1 tbsd vih vil tblr tsds sdti vih vil tsdh figure 7. |???|?????????? (tdm1/0 bits = ?00? & slave mode) tlrb lrck vih bick vil sdto 50%tvdd1 tbss vih vil tblr tsds sdti vih vil tsdh tbsh figure 8. |???|?????????? (tdm1/0 bits = ?00? ?? & slave mode) [AK4612] ms1039-j-01 2009/06 - 23 - lrck bick sdto tbsd tmblr 50%tvdd1 50%tvdd1 50%tvdd1 sdti tsdh tsds vih vil figure 9. |???|?????????? (tdm1/0 bits = ?00? & master mode) lrck bick sdto tbsh tmblr 50%tvdd1 50%tvdd1 50%tvdd1 sdti tsdh tsds vih vil tbss figure 10. |???|?????????? (tdm1/0 bits = ?00? ?? & master mode) [AK4612] ms1039-j-01 2009/06 - 24 - csn vih vil tcss cclk tcds vih vil cdti vih tcckh tcckl tcdh vil c1 c0 r/w cdto hi-z tcsh figure 11. write ?? ??????? (4 3???t?? ) csn vih vil tcsh cclk vih vil cdti vih tcsw vil d1 d0 cdto hi-z d2 tcss figure 12. write ??? ??????? (4 3???t?? ) [AK4612] ms1039-j-01 2009/06 - 25 - csn vih vil cclk vih vil cdti vih vil a0 cdto a1 50%tvdd2 tdcd d7 d6 hi-z figure 13. read ??? z?????? 1 csn vih vil tcsh cclk vih vil cdti vih tcsw vil cdto 50%tvdd2 d2 d1 d0 tccz hi-z tcss figure 14. read ??? z?????? 2 [AK4612] ms1039-j-01 2009/06 - 26 - thigh scl sda vih tlow tbuf thd:sta tr tf thd:dat tsu:dat tsu:sta stop start start stop tsu:sto vil vih vil tsp figure 15. i 2 c t??????? tpd vil pdn tpdv sdto 50%tvdd1 vih figure 16. ???????????? [AK4612] ms1039-j-01 2009/06 - 27 - ?^ ? 3a??? AK4612 x mclk w???1?q`o? ? clock ???hx x?tal ??? ? rb?\qud pb ( figure 17 , figure 18 ) { ?t??t ?as???xz mclk, lrck, bick pb{ mclk q lrck x ?8b? ?axk?? bu? ??d? ?axk??d?{ mclk * t :? ? b?moxz dfs1-0 bit p ? b?mo (manual setting mode) q?? o ?p ? ? b?mo (auto setting mode) w 2 muk??b{ manual setting mode (acks bit = ?0?: default) pxz dfs1-0 bit p????e??u ? ^? ( table 1 ) ze??pw mclk * t :x ?u z^?z o ????x & ~s * t :t ? ? ^??b ( table 3 , table 4 , table 5 ) { auto setting mode (acks bit = ?1?) pxz mclk * t :x ?u z^? ( table 6 ) z o ????x & ~s * t :t ? ? ^?? ( table 7 ) h?z dfs1-0 bit w ? x ?apb{ ?t??t ?as???x mclk w?pb{???? * t :? cks1-0 bit ( table 2 ) pz? ???e??? dfs1-0 bit ( table 1 ) p ? u ?apb{ cks1-0, dfs1-0 bit ? ? `h ?px bick q lrck w z? * t :???a??uz?? ?uk??b{ ?o on sw???r ? (pdn pin = ? n ?) x mclk u ??^???p???? y 6ts??b{ ?t?? ?^ (pdn pin = ?h?) tsmo ?o on sw???r ? (pdn pin = ? n ?) x mclk, lrck u ??^???p???? y 6pb{ ?^t???w??u -`o6 s???u??^?h ?z z?t?;u c \b?d quk ??bwpz?;ue jts? ?x? ?p???`oxi^m{ dfs1 dfs0 sampling speed mode (fs) 0 0 normal speed mode 32khz~48khz 0 1 double speed mode 64khz~96khz (default) 1 0 quad speed mode 128khz~192khz 1 1 n/a - (n/a: not available) table 1. ????e?? (manual setting mode) cks1 cks0 normal speed mode double speed mode quad speed mode 0 0 256fs 256fs 128fs 0 1 384fs 256fs 128fs 1 0 512fs 256fs 128fs (default) 1 1 512fs 256fs 128fs table 2. ???? ?? * t : ? r (master mode) lrck mclk (mhz) bick (mhz) fs 256fs 384fs 512fs 64fs 32.0khz 8.1920 12.2880 16.3840 2.0480 44.1khz 11.2896 16.9344 22.5792 2.8224 48.0khz 12.2880 18.4320 24.5760 3.0720 table 3. 3a???? (normal speed mode @manual setting mode) [AK4612] ms1039-j-01 2009/06 - 28 - lrck mclk (mhz) bick (mhz) fs 256fs 64fs 88.2khz 22.5792 5.6448 96.0khz 24.5760 6.1440 table 4. 3a???? (double speed mode @manual setting mode) lrck mclk (mhz) bick (mhz) fs 128fs 64fs 176.4khz 22.5792 11.2896 192.0khz 24.5760 12.2880 table 5. 3a???? (quad speed mode @manual setting mode) mclk sampling speed mode 512fs normal speed mode 256fs double speed mode 128fs quad speed mode table 6. ????e?? (auto setting mode) lrck mclk (mhz) fs 128fs 256fs 512fs sampling speed mode 32.0khz - - 16.3840 44.1khz - - 22.5792 48.0khz - - 24.5760 normal speed mode 88.2khz - 22.5792 - 96.0khz - 24.5760 - double speed mode 176.4khz 22.5792 - - 192.0khz 24.5760 - - quad speed mode table 7. 3a???? (auto setting mode) [AK4612] ms1039-j-01 2009/06 - 29 - ???1? AK4612 w xti pin txz?<wmopw???w??ud pb{ 1) ? ??????o ? xti xto AK4612 external clock figure 17. ? ????t?? note. tvdd1 ? w???x ??`smpxi^m{ 2) x?tal ??o ? xti xto AK4612 figure 18. x?tal t?? note: ???w ?x + ??t? `?b (typ.10pf) { + ????;b?mx tvdd1=3.0~3.6v pb{ [AK4612] ms1039-j-01 2009/06 - 30 - differential / single-end ?? ~? 8q AK4612 x die1-3 bit ? ?1? tb?q differential ?? ( figure 19 ) z ?0? tb?q single-end ?? ( figure 20 ) ? ? rp v?b{ differential ?? ? rt" w ??e?? vcom ?yz?o" w ??e?? ?? ??q`o?;` smpxi^m{ single-end ?? ? rx l/rin1-3- pin tx l/rin1-3 pin t ??^?h ??w s 8u z?^? ?h? single-end ?? ? rx l/rin1-3- pin ? open t`oxi^m{?hz AK4612 x differential ?? ? rz single-end ?? ? r?t???????????? o `om?b{ scf l/rin+ l/rin- lpf lpf AK4612 figure 19. differential input (die1-3 bit = ?1?) scf l/rin l/rin- lpf AK4612 (open) figure 20. single-end input (die1-3 bit = ?0?) differential / single-end z? ~? 8q AK4612 x doe 1-4bit ? ?1? tb?q differential z? ( figure 21 ) z ?0? tb?q single-end z? ( figure 22 ) ? ? rp v?b{ single-end z? ? rx l/rout1-4- pin tx vcom ?yu z?^??h? single-end z? ? rx l/rout1-4- pin ? open t`oxi^m{ ?hz single-end z? ? rtx???q??3????? (scf) q ???? (ctf) ? o `om?h? ? ! e+u c \b? 3???? ( 3?e???? ) ? ??b ?\qupv?b{ differential z? ? rtx???q??3????? (scf) x o ^?om?buz ???? (ctf) ? o `om?d?wp 3????? ??`hm ?x? ?p lpf ? ?pxi^m{ scf l/rout+ l/rout- AK4612 figure 21. differential output (doe1-4 bit = ?1?) scf l/rout l/rout- lpf diff to singl e AK4612 (open) figure 22. single-end output (doe1-4 bit = ?0?) [AK4612] ms1039-j-01 2009/06 - 31 - ?????3???? iir ????t?? 3 * t : (32khz, 44.1khz, 48khz) 0 w?????3???? (50/15s ? q ) ? o `om?b{ double speed mode z quad speed mode ?????3????x ? $t off ts??b{ ? x?t?? mz dac1(sdti1), dac2(sdti2), dac3(sdti3), dac4(sdti4) t 0`o ?qt ? pv?b{ mode sampling speed mode dem11 (dem61-21) dem10 (dem60-20) dem 0 normal speed mode 0 0 44.1khz 1 normal speed mode 0 1 off (default) 2 normal speed mode 1 0 48khz 3 normal speed mode 1 1 32khz table 8. ?????3???? ???? hpf adc x dc |???????wh?t???? hpf ? o `?b{ hpf w fc xz fs=48khz 1.0hz tsl os?z * t : tx fs t z?`?b{ ???? z? AK4612 x???? z?e???j?b{ div bit ? ?1? tb?q 1/2 *`h???u mcko pin t? z?^??b ( table 9 ) { div mcko 0 xti x1 1 xti x1/2 (default) table 9. ???? z? * t : ? r ?t??q?t?? ?t??q?t??w ~? 8qx m/s pin p?m?b{ ?h? p?t??z ?l? p?t? ?pb{?t?? (m/s pin = ?h? ) tx lrck, bick pin x z?qs??b{?t?? (m/s pin = ?l? ) tx lrck , bick pin x ??qs??b{ lrck, bick pin x table 10 w?ots??b{ pdn pin m/s pin lrck pin bick pin l input input l h ?l? z? ?l? z? l input input h h output output table 10. lrck, bick pin [AK4612] ms1039-j-01 2009/06 - 32 - |???|????????? (1) stereo mode tdm1-0 bit =?00? wqvz 10 w??????? ( table 11 ) u dif2-0 bit p ? rpv?b{ ?t??q? msb ????z 2?s ??y??w???????pz sdto1-3 x bick wqj<u?p z?^?z sdti1-4 x bick wqj u?p???^??b{ sdti pin w ??????wojz mode3/4/8/9/13/14/18/19/23/24/28/29/33/34/38/39 ? 16 20 bit p?lh ? x???wsm lsb tx ?0? ? ??`o<^m{ lrck bick mode m/s tdm1 tdm0 dif2 dif1 dif0 sdto1-3 sdti1-4 i/o i/o 0 0 0 0 0 0 0 24bit, left justified 16bit, right justified h/l i 32fs i 1 0 0 0 0 0 1 24bit, left justified 20bit, right justified h/l i 48fs i 2 0 0 0 0 1 0 24bit, left justified 24bit, right justified h/l i 48fs i 3 0 0 0 0 1 1 24bit, left justified 24bit, left justified h/l i 48fs i 4 0 0 0 1 0 0 24bit, i 2 s 24bit, i 2 s l/h i 48fs i (default) 5 1 0 0 0 0 0 24bit, left justified 16bit, right justified h/l o 64fs o 6 1 0 0 0 0 1 24bit, left justified 20bit, right justified h/l o 64fs o 7 1 0 0 0 1 0 24bit, left justified 24bit, right justified h/l o 64fs o 8 1 0 0 0 1 1 24bit, left justified 24bit, left justified h/l o 64fs o 9 1 0 0 1 0 0 24bit, i 2 s 24bit, i 2 s l/h o 64fs o table 11. |???|??????? (stereo mode) note. stereo mode p?;b? ?z normal speed mode px ? z????w ?o tvdd1 x 1.6v ? 3.6v p?; b?\qupv?b{ double speed mode, quad speed mode p?;b?mtx tvdd1 x 3.0v ? 3.6v p? ;`oxi^m{ [AK4612] ms1039-j-01 2009/06 - 33 - (2) tdm mode tdm1-0 bit = ?01? q ? b?\qt?? tdm i/f ??????;pv?b{ 5 w??????? u dif2-0 bit p ? rpvz ?t??q? msb ????z 2?s ??y??w???????pz sdto1/2 x bick wqj u?p z?^?z sdti1/2/3 x bick wqj u?p???^??b{ tdm512 mode(fs=48khz) x tdm1-0 bit = ?01? p ? rpv?b ( table 12 ) { sdto1 pin tx ? adc(6ch) w??? u z?^??b{ sdto2/3 pin = ?l? pb{ sdti1 pin tx ? dac(8ch) w???? ??`?b{ sdti2-4 pin ?w ?????x1^??b{ bick x 512fs { z lrck w ?h? ?z ?l? ?x 1/512fs(min) pb{ tdm256 mode (fs=96khz) x tdm1-0 bit = ?10? p ? rpv?b ( table 13 ) { sdto1 pin tx ? adc(6ch) w??? u z?^??b{ sdto2/3 pin = ?l? pb{ sdti1 pin tx dac(8ch: l1, r1, l2, r2, l3, r3, l4, r4) w ? 8ch w? ??? ??`?b{ sdti2-4 pin ?w ?????x1^??b{ bick x 256fs { z lrck w ?h? ?z ?l? ? x 1/256fs(min) pb{ tdm128 mode (fs=192khz) x tdm1-0 bit = ?11? p ? rpv?b ( table 14 ) { sdto1 pin tx adc(4ch: l1, r1, l2, r2) w???u z?^?z sdto2 pin tx adc(2ch: l3, r3) w???u z?^??b{ sdto3 pin = ?l? pb{ sdti1 pin tx dac(4ch; l1, r1, l2, r2) z sdti2 pin tx dac(4ch: l3, r3, l4, r4) w ? 8ch w???? ??`?b{ sdti3-4pin ?w ?????x1^??b{ bick x 128fs { z lrck w ?h? ?z ?l? ?x 1/128fs(min) pb{ lrck bick mode m/s tdm1 tdm0 dif2 dif1 dif0 sdto1-3 sdti1-4 i/o i/o 10 0 0 1 0 0 0 24bit, left justified 16bit, right justified i 512fs i 11 0 0 1 0 0 1 24bit, left justified 20bit, right justified i 512fs i 12 0 0 1 0 1 0 24bit, left justified 24bit, right justified i 512fs i 13 0 0 1 0 1 1 24bit, left justified 24bit, left justified i 512fs i 14 0 0 1 1 0 0 24bit, i 2 s 24bit, i 2 s i 512fs i 15 1 0 1 0 0 0 24bit, left justified 16bit, right justified o 512fs o 16 1 0 1 0 0 1 24bit, left justified 20bit, right justified o 512fs o 17 1 0 1 0 1 0 24bit, left justified 24bit, right justified o 512fs o 18 1 0 1 0 1 1 24bit, left justified 24bit, left justified o 512fs o 19 1 0 1 1 0 0 24bit, i 2 s 24bit, i 2 s o 512fs o table 12. |???|??????? (tdm512 mode) [AK4612] ms1039-j-01 2009/06 - 34 - lrck bick mode m/s tdm1 tdm0 dif2 dif1 dif0 sdto1-3 sdti1-4 i/o i/o 20 0 1 0 0 0 0 24bit, left justified 16bit, right justified i 256fs i 21 0 1 0 0 0 1 24bit, left justified 20bit, right justified i 256fs i 22 0 1 0 0 1 0 24bit, left justified 24bit, right justified i 256fs i 23 0 1 0 0 1 1 24bit, left justified 24bit, left justified i 256fs i 24 0 1 0 1 0 0 24bit, i 2 s 24bit, i 2 s i 256fs i 25 1 1 0 0 0 0 24bit, left justified 16bit, right justified o 256fs o 26 1 1 0 0 0 1 24bit, left justified 20bit, right justified o 256fs o 27 1 1 0 0 1 0 24bit, left justified 24bit, right justified o 256fs o 28 1 1 0 0 1 1 24bit, left justified 24bit, left justified o 256fs o 29 1 1 0 1 0 0 24bit, i 2 s 24bit, i 2 s o 256fs o table 13. |???|??????? (tdm256 mode) lrck bick mode m/s tdm1 tdm0 dif2 dif1 dif0 sdto1-3 sdti1-4 i/o i/o 30 0 1 1 0 0 0 24bit, left justified 16bit, right justified i 128fs i 31 0 1 1 0 0 1 24bit, left justified 20bit, right justified i 128fs i 32 0 1 1 0 1 0 24bit, left justified 24bit, right justified i 128fs i 33 0 1 1 0 1 1 24bit, left justified 24bit, left justified i 128fs i 34 0 1 1 1 0 0 24bit, i 2 s 24bit, i 2 s i 128fs i 35 1 1 1 0 0 0 24bit, left justified 16bit, right justified o 128fs o 36 1 1 1 0 0 1 24bit, left justified 20bit, right justified o 128fs o 37 1 1 1 0 1 0 24bit, left justified 24bit, right justified o 128fs o 38 1 1 1 0 1 1 24bit, left justified 24bit, left justified o 128fs o 39 1 1 1 1 0 0 24bit, i 2 s 24bit, i 2 s o 128fs o table 14. |???|??????? (tdm128 mode) note. tdm mode p?;b? ?z ? z????w ?o tvdd1 x 3.0v ? 3.6v p?;`oxi^m{ [AK4612] ms1039-j-01 2009/06 - 35 - lrck bick(64fs) sdto ( o ) 0 1 2 16 17 18 24 25 31 0 1 2 16 17 18 24 25 31 0 23 1 22 0 23 22 8 7 6 0 23 sdti(i) 1 14 0 15 8 7 1 14 0 15 8 7 lch data rch data don?t care don?t care 8 7 6 sdto-23:msb, 0:lsb; sdti-15:msb, 0:lsb figure 23. mode 0/5 ????? (stereo mode) lrck bick ( 64fs ) sdto ( o ) 0 1 2 12 13 14 24 25 31 0 1 2 12 13 14 24 25 31 0 23 1 22 0 23 22 12 11 10 0 23 sdti ( i ) 1 18 0 19 8 7 1 18 0 19 8 7 lch data rch data don?t care don?t care 12 11 10 sdto-23:msb, 0:lsb; sdti-19:msb, 0:lsb figure 24. mode 1/6 ????? (stereo mode) lrck bick ( 64fs ) sdto ( o ) 0 1 2 8 9 10 24 25 31 0 1 2 8 9 10 24 25 31 0 23 1 22 0 23 22 16 15 14 0 23 sdti ( i ) 1 22 0 23 8 7 1 22 0 23 8 7 23:msb, 0:lsb lch data rch data don?t care don?t care 16 15 14 figure 25. mode 2/7 ????? (stereo mode) lrck bick ( 64fs ) sdto ( o ) 0 1 2 21 22 23 24 31 0 1 2 0 23 1 22 1 23 22 23 sdti ( i ) 22 23 0 22 23 23:msb, 0:lsb lch data rch data don?t care 2 2 1 28 29 30 23 0 22 23 24 31 1 0 don?t care 2 21 28 29 30 0 figure 26. mode 3/8 ????? (stereo mode) [AK4612] ms1039-j-01 2009/06 - 36 - lrck bick ( 64fs ) sdto ( o ) 0 1 2 3 22 23 24 25 0 0 1 sdti ( i ) 31 29 30 23 22 1 22 23 0 23:msb, 0:lsb lch data rch data don?t care 2 2 1 0 2 3 22 23 24 25 0 31 29 30 23 22 1 22 23 0 don?t care 2 21 0 1 figure 27. mode 4/9 ????? (stereo mode) bick ( 512fs ) sdto1 ( o ) sdti1 ( i ) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 22 0 r1 32 bick 23 23 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 22 23 14 0 15 14 0 15 14 0 15 14 0 15 14 0 15 14 0 15 14 0 15 14 0 15 22 0 l2 32 bick 22 0 r2 32 bick 23 23 22 0 l3 32 bick 22 0 r3 32 bick 23 23 15 lrck ( mode10 ) 512bick lrck ( mode15 ) figure 28. mode 10/15 timing (tdm512 mode) bick ( 512fs ) sdto1 ( o ) sdti1 ( i ) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 22 0 r1 32 bick 23 23 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 22 23 18 0 19 18 0 19 18 0 19 18 0 19 18 0 19 18 0 19 18 0 19 18 0 19 22 0 l2 32 bick 22 0 r2 32 bick 23 23 22 0 l3 32 bick 22 0 r3 32 bick 23 23 19 lrck ( mode11 ) 512bick lrck ( mode16 ) figure 29. mode 11/16 timing (tdm512 mode) bick ( 512fs ) sdto1 ( o ) sdti1 ( i ) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 22 0 r1 32 bick 23 23 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 22 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 l2 32 bick 22 0 r2 32 bick 23 23 22 0 l3 32 bick 22 0 r3 32 bick 23 23 23 lrck ( mode12 ) 512bick lrck ( mode17 ) figure 30. mode 12/17 timing (tdm512 mode) [AK4612] ms1039-j-01 2009/06 - 37 - bick ( 512fs ) sdto1 ( o ) sdti1 ( i ) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 22 0 r1 32 bick 23 2 3 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 22 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 l2 32 bick 22 0 r2 32 bick 23 23 22 0 l3 32 bick 22 0 r3 32 bick 23 23 22 23 lrck ( mode13 ) 512bick lrck ( mode18 ) figure 31. mode 13/18 timing (tdm512 mode) bick ( 512fs ) sdto1 ( o ) sdti1 ( i ) 23 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 23 0 r1 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 32 bick 23 23 0 23 0 23 0 23 0 23 0 23 0 23 0 23 0 23 0 l2 32 bick 23 0 r2 32 bick 23 0 l3 32 bick 23 0 r3 32 bick 23 lrck ( mode14 ) 512bick lrck ( mode19 ) figure 32. mode 14/19 timing (tdm512 mode) bick(256fs) sdto1(o) sdti1(i) 22 0 l1 32 bick 14 0 l1 32 bick 14 0 r1 32 bick 14 0 l2 32 bick 14 0 r2 32 bick 14 0 l3 32 bick 14 0 r3 32 bick 14 0 l4 32 bick 14 0 r4 32 bick 22 0 r1 32 bick 22 23 15 15 15 15 15 23 15 15 15 23 15 lrck (mode20) 22 0 l2 32 bick 22 0 r2 32 bick 23 23 22 0 l3 32 bick 22 0 r3 32 bick 23 23 256 bick lrck (mode25) figure 33. mode 20/25 timing (tdm256 mode) [AK4612] ms1039-j-01 2009/06 - 38 - bick(256fs) sdto1(o) sdti1(i) 22 0 l1 32 bick 18 0 l1 32 bick 18 0 r1 32 bick 18 0 l2 32 bick 18 0 r2 32 bick 18 0 l3 32 bick 18 0 r3 32 bick 18 0 l4 32 bick 18 0 r4 32 bick 22 0 r1 32 bick 22 23 19 19 19 19 19 23 19 19 19 23 19 lrck (mode21) 22 0 l2 32 bick 22 0 r2 32 bick 23 23 22 0 l3 32 bick 22 0 r3 32 bick 23 23 256 bick lrck (mode26) figure 34. mode 21/26 timing (tdm256 mode) bick(256fs) sdto1(o) sdti1(i) 22 0 l1 32 bick 22 0 l1 32 bick 22 0 r1 32 bick 22 0 l2 32 bick 22 0 r2 32 bick 22 0 l3 32 bick 22 0 r3 32 bick 22 0 l4 32 bick 22 0 r4 32 bick 22 0 r1 32 bick 22 23 23 23 23 23 23 23 23 23 23 23 23 lrck (mode22) 22 0 l2 32 bick 22 0 r2 32 bick 23 23 22 0 l3 32 bick 22 0 r3 32 bick 23 23 256 bick lrck (mode27) figure 35. mode 22/27 timing (tdm256 mode) bick(256fs) sdto1(o) sdti1(i) 22 0 l1 32 bick 22 0 l1 32 bick 22 0 r1 32 bick 22 0 l2 32 bick 22 0 r2 32 bick 22 0 l3 32 bick 22 0 r3 32 bick 22 0 l4 32 bick 22 0 r4 32 bick 22 0 r1 32 bick 22 23 23 23 23 23 23 23 23 23 23 23 23 lrck (mode23) 22 22 0 l2 32 bick 22 0 r2 32 bick 23 23 22 0 l3 32 bick 22 0 r3 32 bick 23 23 256 bick lrck (mode28) figure 36. mode 23/28 timing (tdm256 mode) [AK4612] ms1039-j-01 2009/06 - 39 - bick(256fs) sdto1(o) sdti1(i) 23 0 l1 32 bick 23 0 l1 32 bick 23 0 r1 32 bick 23 0 l2 32 bick 23 0 r2 32 bick 23 0 l3 32 bick 23 0 r3 32 bick 23 0 l4 32 bick 23 0 r4 32 bick 23 0 r1 32 bick 23 lrck (mode24) 23 32 bick 32 bick 23 0 l3 32 bick 23 0 r3 32 bick 23 0 l2 23 0 r2 256 bick lrck (mode29) figure 37. mode 24/29 timing (tdm256 mode) bick(128fs) sdto1(o) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 22 0 r1 32 bick 22 23 23 sdti1(i) 0 0 14 0 14 0 15 15 15 15 lrck (mode30) sdti2(i) 0 0 0 14 0 15 15 15 14 15 15 14 14 14 15 23 14 22 0 l2 32 bick 22 0 r2 32 bick 23 23 sdto2(o) 22 0 l3 32 bick 22 0 r3 32 bick 23 23 128 bick lrck (mode35) figure 38. mode 30/35 timing (tdm128 mode) [AK4612] ms1039-j-01 2009/06 - 40 - bick(128fs) sdto1(o) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 22 0 r1 32 bick 22 23 23 sdti1(i) 0 0 18 0 18 0 19 19 19 19 lrck (mode31) sdti2(i) 0 0 0 18 0 19 19 19 18 19 19 18 18 18 19 23 18 22 0 l2 32 bick 22 0 r2 32 bick 23 23 sdto2(o) 22 0 l3 32 bick 22 0 r3 32 bick 23 23 128 bick lrck (mode36) figure 39. mode 31/36 timing (tdm128 mode) bick(128fs) sdto1(o) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 22 0 r1 32 bick 22 23 23 sdti1(i) 0 0 22 0 22 0 23 23 23 23 lrck (mode32) sdti2(i) 0 0 0 22 0 23 23 23 22 23 23 22 22 22 23 23 22 sdto2(o) 22 0 l3 32 bick 22 0 r3 32 bick 22 23 23 23 22 0 l2 32 bick 22 0 r2 32 bick 23 23 128 bick lrck (mode37) figure 40. mode 32/37 timing (tdm128 mode) [AK4612] ms1039-j-01 2009/06 - 41 - bick(128fs) sdto1(o) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 22 0 r1 32 bick 22 23 23 sdti1(i) 0 0 22 0 22 0 23 23 23 lrck (mode33) sdti2(i) 23 22 22 23 22 23 0 0 22 0 22 0 23 23 23 23 22 22 22 23 sdto2(o) 22 0 l3 32 bick 22 0 r3 32 bick 22 23 23 23 22 0 l2 32 bick 22 0 r2 32 bick 23 23 128 bick lrck (mode38) figure 41. mode 33/38 timing (tdm128 mode) bick(128fs) sdto1(o) 22 0 l1 32 bick l1 32 bick r1 32 bick l2 32 bick r2 32 bick l3 32 bick r3 32 bick l4 32 bick r4 32 bick 23 0 r1 32 bick 23 sdti1(i) 0 0 23 0 23 0 lrck (mode34) sdti2(i) 23 23 23 0 0 23 0 23 0 23 23 23 sdto2(o) 23 0 l3 32 bick 23 0 r3 32 bick 23 23 0 l2 32 bick 23 0 r2 32 bick 128 bick lrck (mode39) figure 42. mode 34/39 timing (tdm128 mode) [AK4612] ms1039-j-01 2009/06 - 42 - |???u z; AK4612 x??? ??w|???u z; ??j?b{|???u z; xz ovfe bit = ?1? p ?ts??b{|???u zx????w??? ??t 0`???z????w or ? ?? b{ lch ?hx rch w??? ??u|???b?q (-0.3dbfs ? ) z ovfm2-0 bit p ? ^?h??? zt ao ovf1/2 pin u ?h? ts??b{|???`h??? ??t 0b? ovf1/2 pin w z?x adc q ?a ? (gd = 16/fs = 333 s @fs=48khz) ??j?b{????r ?? (pdn= ?l? ?h?) z 518/fs (=11.8ms @fs=48khz) w ovf1/2 pin x ?l? pzfw?|???u z; u?ts??b{ mode ovfm2 ovfm1 ovfm0 lin1 or rin1 lin2 or rin2 lin3 or rin3 0 0 0 0 ovf1 ovf1 ovf1 1 0 0 1 ovf1 ovf2 - 2 0 1 0 - ovf1 ovf2 3 0 1 1 ovf2 - ovf1 4 1 0 0 ovf2 ovf2 ovf2 5 1 0 1 6 1 1 0 7 1 1 1 disable (ovf2=ovf1= ?l?) (default) table 15. |???u z???? (ovfe= ?1?) ?u z; AK4612 x 2 % ww?u z; ??j?b{?u z; xz ovfe bit =?0? p?ts??b{???w ??? zx dzfm3-0 bit p ? rpv?b ( table 16 ) { dzf1 pin x??? 1 w???z dzf2 pin x??? 2 w???t 0 `?b{?u z; px????w and ? ?z mode 0-4 px dzf1 pin x ? 8ch w and ? ??b{ dzf2 pin x mode 0 w ?l? pz mode 1-3 w ?h? pb{ ??? 1( ??? 2) w ????u 8192 s `o ?0? w ?z dzf1(dzf2) pin x ?h? ts??b{fw ???? 1( ??? 2) wmc?tw???w ?????u ?0? psxs?q ?l? ts??b{ dzfm aout mode 3 2 1 0 l1 r1 l2 r2 l3 r3 l4 r4 0 0 0 0 0 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 1 0 0 0 1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 2 0 0 1 0 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 3 0 0 1 1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 4 0 1 0 0 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 5 0 1 0 1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf2 6 0 1 1 0 dzf1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf2 dzf2 7 0 1 1 1 dzf1 dzf1 dzf1 dzf1 dzf1 dzf2 dzf2 dzf2 8 1 0 0 0 dzf1 dzf1 dzf1 dzf1 dzf2 dzf2 dzf2 dzf2 9 1 0 0 1 dzf1 dzf1 dzf1 dzf2 dzf2 dzf2 dzf2 dzf2 10 1 0 1 0 dzf1 dzf1 dzf2 dzf2 dzf2 dzf2 dzf2 dzf2 11 1 0 1 1 dzf1 dzf2 dzf2 dzf2 dzf2 dzf2 dzf2 dzf2 12 1 1 0 0 dzf2 dzf2 dzf2 dzf2 dzf2 dzf2 dzf2 dzf2 13 1 1 0 1 14 1 1 1 0 disable (dzf1=dzf2= ?l?) 15 1 1 1 1 (default) table 16. ?u z???? (ovfe= ?0?) [AK4612] ms1039-j-01 2009/06 - 43 - ???????; AK4612 x??? ?q??????? (256 ?? , 0.5db a? ) ? o `om?b{ n 0?x ?w att7-0 bit pf?g? ? `?b ( table 17 ) { att7-0 attenuation level 00h 0db 01h -0.5db 02h -1.0db : : 7dh -62.5db 7eh -63.0db 7fh -63.5db : feh -127.0db ffh mute (- ) (default) table 17. ???????wn 0? ???????w -?x ats1-0 bit p ? `?b ( table 18 ) { mode0, mode1, mode2 px ? ?w -?x1?? -?pb{`huloz -? t???????x c \`?d?{ mode ats1 ats0 att speed 0 0 0 4096/fs 1 0 1 2048/fs 2 1 0 512/fs 3 1 1 256/fs (default) table 18. ???????w -? mode0 w ?z att ? w -?x 4096 ??p1?? -?`?b{ 00h(0db) t? ffh(mute) ?ptx 4096/fs (85.3ms@fs=48khz) tt??b{ pdn pin ? ?l? tb?qz att7-0 bit x 00h t s8=^??b{ att7-0 bit x rstn bit ? ?0? tb?q t 00h ts?z rstn bit ? ?1? tbq ? ?tlomv?b{ [AK4612] ms1039-j-01 2009/06 - 44 - 1?????; 1?????x???? $t??^??b{ smute bit ? ?1? tb?qfw :w att ? ?t? ? ^ ?h???????w -? ( table 18 ) ? op ?????u - (?0?) ?p?a?3??^??b{ smute bit ? ?0? tb?qz - t? ? ^?h???????w -? ( table 18 ) ? op att ? ? ?p ?<`?b{1????????z - ?p?a?3??^?? 2tr ?^??q?a?3??u ?^?z ?a???p att ? ??p ?<`?b{1?????; x ???-?ct ??o? ~? 8q? ?srt?pb{ smute bit attenuation dzf1,2 att level - ? : (1) ? ^?h???????w -? ( table 18 ) ? op - (?0?) ?p?a?3??^??b{? qyz mode 0 z att ? ?u ?00h? w ?x 4096/fs ???pb{1?????p -?b? att ? x 00h ? ffh pb{ (2) ? ^?h???????w -? ( table 18 ) ? op att ? ??p ?<`?b{ ?qyz mode 0 z att ? ?u ?ffh? w ?x 4096/fs ???pb{1?????p -?b? att ?x ffh ? 00h pb{ (3) ???? ??t 0`o??? z?x ? (gd) ??j?b{ (4) 1????????z - ?p?a?3??^?? 2tr ?^??q?a?3??u ?^?z ? a???p att ? ??p ?<`?b{ (5) ???w ????w ?????u 8192 s `o ?0? w ?z dzf1, 2 pin x ?h? ts??b{ fw???? 1 ??? 2 wmc?tw???w ?????u ?0? psxs?qz dzf1(dzf2) pin x ?l? ts??b{ figure 43. 1?????; q?u z; 3a??? ?o on txz pdn pin t s ?l? ? ??`o???`o<^m{ vcom sr, j ?yw????x mclk pr ?^?zfw? lrck w ? ? t ?8`o o ?s?u????`z o ?w?????u ?^` ?b{ lrck u ??^???p adc, dac x???? y 6pb{ [AK4612] ms1039-j-01 2009/06 - 45 - ????; AK4612 w adc q dac x????e? (pdn pin) ? ?l? tb?\qp????pvz\wqv ?t ????????u???^??b{ pdn = ?l? p o ?? ?x s8=^??b{????t ??z sdto1-3, dzf1-2 pin x ?l? ts?z??? z?x dvmpd pin = ?l? wqv vcom ?yz dvmpd pin = ?h? wqv hi-z ? z?`?b{\w???x ?o d ?t ?c s?lo<^m{ adc w ?z??? ?t??ur ?^??q 3 ? 4/fs ?z s8=??? (518/fs) u??^??b{ fwh?z z???? sdto1-3 x 521 ? 522 x lrck ????? `?b{ dac w ?z????t??ur ?^??q 3 ? 4/fs ?z s 8=??? (516/fs) u??^??b{ s8= z??? z?x dvmpd pin = ?l? pk?y vcom ?yz dvmpd pin = ?h? pk?y hi-z ? z?`?b{ figure 44 t????t|????w3?-??? ?`?b{ a dc internal state pd n cl ock in mclk,lrck,sclk a dc in (analog) a dc out (digital) dac internal state dac in (di gi tal ) dac out (anal og) external mute mut e on (9) power power-down don ?t care gd ?0?data power-down ?0?data gd (3) (3) (4) (7) (7) 518/fs init cycle normal op era tion (1) gd normal op era tion gd (6) (7) 516/fs init cycle (2) mut e on ?0?data ?0?data d on?t care 3~4/fs (10) (5) dzf1/dzf2 don?t care (7) 10~11/fs (11) (12) ? (1) adc x????r ??z??? ?u s8=^??b{ (2) dac x????r ??z??? ?u s8=^??b{ (3) ??? ??t 0b????? z?z???? ??t 0b???? z?x ???j?b{ (4) ???? adc z?x ?0? ???pb{ (5) ???? dac z?x dvmpd pin = ?l? pk?y vcom ?yz dvmpd pin = ?h? pk?y hi-z pb{ (6) ??? ?w s8= 4? adc z?t?;u z?^??b{ ?;ue jts? ?x???? z?? ???`o<^m{ (7) pdn pin wqj<u??zt| pdn pin wqj u??w 519 520/fs ?p?;u z?^??b{ (8) ???? y 6 (pdn pin = ?l?) pxz dzf1-2 pin x ?l? ts??b{ (9) ?; (7) ue jts? ?x??? z??? ?p???`o<^m{ (10) pdn pin ? ?h? t`ot? s8=???u??b??p 3 4/fs tt??b{ (11) pdn pin ? ?h? t`ot? 10 11/fs wx dzf= ?l? pb{ (12) pdn pin = ?l? w y 6p ?o? d ?`zb?ow ?ouqj ulh?z pdn pin ? ?h? t`oxi^m{ figure 44. e??????e?????3?-?? [AK4612] ms1039-j-01 2009/06 - 46 - AK4612 w adc q dac x pmvr bit = ?1? wqv pmadc bit q pmdac bit pf?g? ?qt????pv? b{?hz adc1-3 x pmad1-3 bit pf?g? ?qt????upvz dac1-4 x pmda1-4 bit pf?g? ?qt????upv?b{\wqv? ?x s8=^??d?{ pmadc = ?0? wqv sdto1-3 pin x ?l? ts??b{ pmdac = ?0? wqvz??? z?x dvmpd pin = ?l? pk?y vcom ?yz dvmpd pin = ?h? pk?y hi-z ? z?` dzf1-2 pin x ?h? ts??b{\wqv?;u \a?wpze jts? ?x? ?p???`o<^m{ figure 45 t????t|????w3?-????`?b{ a dc internal state pmadc/pmdac bit 518/fs normal operation power-down init cycle normal operation (1) don?t care gd gd clock in mclk,lrck,sclk a dc in (analog) ?0?data a dc out (digital) normal operation power-down normal operation dac internal state ?0?data dac in (digital) dac out (analog) gd external mute mute on gd (3) (3) (4) (6) (7) (7) (9) 516/fs init cycle (2) (8) 8 9/fs (12) (5) 3~4/fs (11) 4~5/fs (10) pmvr bit dzf1/dzf2 ? (1) adc x????r ??z??? ?u s8=^??b{ (2) dac x????r ??z??? ?u s8=^??b{ (3) ??? ??t 0b????? z?z???? ??t 0b???? z?x ???j?b{ (4) ???? adc z?x ?0? ???pb{ (5) ???? dac z?x dvmpd pin = ?l? pk?y vcom ?yz dvmpd pin = ?h? pk?y hi-z pb{ (6) ??? ?w s8= 4? adc z?t?;u z?^??b{ ?;ue jts? ?x???? z?? ???`o<^m{ (7) pmdac bit t ?0? ? {v?pt? 4~5/fs ?zt| pmdac bit t ?1? ? {v?pt? 519 520/fs ?p? ;u z?^??b{ (8) ???? y 6 (pmdac bit = ?0?) pxz dzf1-2 pin x ?h? ts??b{ (9) ?; (7) ue jts? ?x??? z??? ?p???`o<^m{ (10) pmadc bit t ?0? ? {v?pt?? pb? adc u????b??p 4~5/fs tt??b{ pmdac bit t ?0? ? {v?pt?? pb? dac u????b??p 4~5/fs tt??b{ (11) pmadc bit t| pmdac bit ? ?1? t`ot? s8=???u??b??p 3 4/fs tt??b{ (12) pmdac bit t ?1? ? {v?pt? 8~9/fs ? ?l? ts??b{ figure 45. ???????????????3?-?? [AK4612] ms1039-j-01 2009/06 - 47 - ???; rstn = ?0? wqv adc x??? ?q???? ?u????z dac x???? ?u????` ?bu? ?x s8=^??d?{\wqv dzf1-2 pin x ?h? z sdto1-3 pin x ?l? ts?z??? z ?x dvmpd pin w ? t??c vcom ?ys??b{\w?;u \a?wpze jts? ?x? ?p ???`o<^m{ figure 46 t rstn bit t?????3?-???`?b{ a dc internal state rstn bit normal operation power-down normal operation don?t care gd gd clock in mclk,lrck,sclk a dc in (analog) ?0?data a dc out (digital) normal operation normal operation dac internal state ?0?data dac in (digital) dac out (analog) gd gd (2) (2) (3) (4) (6) (6) dzf1/dzf2 internal rstn bit digital block power-down 3~4/fs (9) 4~5/fs (8) 8 ? (1) adc x????r ??z??? ?u s8=^??b{ (2) ??? ??t 0b????? z?z???? ??t 0b???? z?x ? (gd) ??j? b{ (3) ???? adc z?x ?0? ???pb{ (4) ??? ?w s8= 4? adc z?t?;u z?^??b{ ?;ue jts? ?x???? z?? ???`o<^m{ (5) rstn= ?0? wz??? z?x dvmpd pin w ? t??c vcom ?ypb{ (6) rstn bit u ?0? tslot? 4 5/fs ?zt| rstn bit u ?1? tslot? 3 4/fs ?t?;u z?^??b{ (7) dzf1-2 pin x rstn bit u ?0? ts?q ?h? ts?z rstn bit u ?1? tslot? 8~9/fs ? ?l? ts??b{ (8) rstn bit t ?0? ? {v?pt? lsi o ?w rstn bit u!=b??p 4~5/fs tt??b{ (9) rstn bit t ?1? ? {v?pt? s8=???u??b??p 3 4/fs tt??b{ figure 46. ???3?-?? [AK4612] ms1039-j-01 2009/06 - 48 - adc x ????; AK4612 px adc ??y????? pmad3-1 bit t??x t?????b?\qupv?b{ ??y????? pmad3-1 bit u ?0? wqvz? pb? adc w??? ?z???? ?x?t? ???^??b{ adc x????r ??z??? ?u s8=^??b{??? ??t 0b?? ??? z?x ? (gd) ??j?b{???? adc z?x ?0? ???pb{??? ?w s8= 4 ? adc z?t?;u z?^??b{?;ue jts? ?x???? z?????`o<^m{ pmad3-1 bit a dcdigital internal state normal operation a dc analog internal state power-down clock in mclk,lrck,sclk normal operation channel power-down normal operation power down channel normal operation power-down power-down normal operation 2~3/fs (2) 2~3/fs (2) init cycle normal operation 518/fs (3) init cycle normal operation 518/fs (3) 4~5/fs (1) 4~5/fs (1) gd gd a dc in (analog) ?0?data a dc out (digital) (4) (5) (6) (6) (4) gd gd a dc in (analog) ?0?data a dc out (digital) (5) (4) (4) ? (1) pmad3-1 bit t ?0? ? {v?pt?? pb? adc u????b??p 4~5/fs tt??b{ (2) pmad3-1 bit t ?1? ? {v?pt? s8=???u??b??p 2 3/fs tt??b{ (3) adc x????r ??z??? ?u s8=^??b{ (4) ??? ??t 0b????? z?x ? (gd) ??j?b{ (5) ???? adc z?x ?0? ???pb{ (6) ??? ?w s8= 4? adc z?t?;u z?^??b{?;ue jts? ?x???? z ?????`o<^m{ figure 47. adc x ????? [AK4612] ms1039-j-01 2009/06 - 49 - dac x ????; AK4612 px dac ??y????? pmda4-1 bit t??x t?????b?\qupv?b{ ??y?????u ?0? wqvz? pb? dac w??? ?z???? ?x?t????^ ??b{ pmda4-1 bit t??????^?h dac w??? z?x dvmpd pin = ?l? pk?y vcom ?yz dvmpd pin = ?h? pk?y hi-z ts??b{?h dzf u zx?lom?buz dzf u zalx dzf1-2 pin t s ^?sxs??b{????w ? ~r ?w?mp?;u \a?h?ze jts? ?x? ?p? ??z?`xx pmdac bit = ?0? ?hx rstn bit = ?0? wt pmda4-1 bit w ? ??loxi^m{ figure 48 t pmda4-1 bit t??????t|????w3?-???`?b{ pmda4-1 bit dzf1/dzf2 8192/fs ?0?dat a dac in (digital) dac out (analog) gd gd (1 ) (3 ) (3) (2) dac digital internal state normal operation dac analog internal state power-down clock in mclk,lrck,sclk dac in (digital) dac out (analog) normal operation channel (7) (8 ) gd 8192/fs gd power-down normal operat ion (2 ) (3) (3) (7) power down channel dzf detect internal state dzf detect internal state ?0?data (9) normal operation power-down power-down normal operation 2~3/f s (5) 2~3/fs (5) init cycle normal operation 516/fs (6) init cycle normal operation 516/fs (6) 4~5/fs (4) 4~5/f s (4) ? (1) ???? ??t 0b???? z?x ? (gd) ??j?b{ (2) pmda4-1 bit p????^?h dac w??? z?x dvmpd pin = ?l? pk?y vcom ?yz dvmpd pin = ?h? pk?y hi-z pb{ (3) pmda4-1 bit t ?0? ? {v?pt? 4~5/fs pz pmda4-1 bit t ?1? ? {v?pt? 518 519/fs p dac w z?tx?;u z?^??b{ (4) pmda4-1 bit t ?0? ? {v?pt?? pb? dac u????b??p 4~5/fs tt??b{ (5) pmda4-1 bit t ?1? ? {v?pt? s8=???u??b??p 2 3/fs tt??b{ (6) dac x????r ??z??? ?u s8=^??b{ (7) ????^?h dac px dzf u zx?lom?buzu zalx dzf1-2 pin tx s^??d ?{ (8) ???? ? t??z????^?h dac w dzf u zalu1^?z dzf1-2 pin u ?h? t s??b{ (9) ???????sm dac t ??uk? ?tzx ??????lo? dzf1-2 pin x ?h? txs??d?{?;ue jts? ?tx??? z??? ?p???`oxi^m{ figure 48. dac x ????? [AK4612] ms1039-j-01 2009/06 - 50 - 3???????????? AK4612 w; xe??hx?p ? pv?b{ ??w {v?mx 2 (4 3???z i 2 c ) k??b{????x cad0, cad1 pin w ? p> ^??b{ pdn pin ? ?l? tb?q o ? ? ?x s8=^??b{ rstn bit t ?0? ? {v?q o ??????s?u???^??b{ ``z\ w?w o0x s8=^??d?{ * pdn = ?l? x??????w {v?xpv?d?{ (1) 4 3???????t?? (i2c pin = ?l?) ? ? x 4 3??? i/f pin(csn, cclk, cdti, cdto) p {v??hx ?? z`??m?b{ i/f w???x chip address (2bits, cad0, cad1 pin p ? ), read/write (1bit), register address (msb first, 5bits) q control data (msb first, 8bits) p? r^??b{??? ? x cclk w ? ? p???? z?`z ! ? x ? ? p ???b{???w {v?x csn w ? ? p?ts?z???w ?? z`x csn w ? ? p z?u hi-z ts??b{ 1 ???w {v??t csn ? s ?h? t`oxi^m{ cclk w???e??x 5mhz (max) pb{ pdn pin= ?l? p?w ?x???^??b{ cdti cclk csn c1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 d4 d5 d6 d7 a1 a2 a3 a4 r/w c0 a0 d0 d1 d2 d3 cdto hi-z write cdti c1 a1 a2 a3 a4 r/w c0 a0 cdto hi-z read d4 d5 d6 d7 d0 d1 d2 d3 hi-z ?h? or ?l? ?h? or ?l? ?h? or ?l? ?h? or ?l? ?h? or ?l? ?h? or ?l? c1 ? c0: chip addres s (c1=cad1, c0=ca0) r/w: read / write (?1?: write, ?0?: read) a4 - a0: register address d7 ? d0: control data figure 49. ???????????? [AK4612] ms1039-j-01 2009/06 - 51 - (2) i 2 c ????t?? (i2c pin = ?h?) AK4612 w i 2 c t??w????xz? t?? (max:400khz) t 0 `om?b{ (2)-1. write ?? i 2 c t??tsz???? {v?3?-?x figure 50 t?^??b{ w ic ?w??txz 7 st?? e (start condition) ? ??`?b{ scl ???u ?h? wt sda ???? ?h? t? ?l? tb?qz ?? eu^???b ( figure 56 ) {?? ew?z???u ?^??b{\w??x 7 ?? ?t?? r^?z 8 ???tx???m2??? (r/w) u v?b{ ? 5 ???x ? 00100 ? { zw 2 ? ??x??b? ic ? ?h?w?????pz cad1, cad0 pin t?? ? ^??b ( figure 51 ) {? ?u ?`h ?z AK4612 x? y t (acknowledge) ? \ r`z??u??^??b{?x? y t;w????? \ r`z sda ????rl`sz?ys??d? ( figure 57 ) { r/w bit u ? 0 ? w ?x ??? {v?z r/w bit u ? 1 ? w ?x??? ?? z`??m?b{ h 2 ??x?? ( ??? ) pb{??x 8 ???z msb first p? r^?z ? 3 ? ??x ?0? { pb ( figure 52 ) { h 3 ????x???????pb{???????x 8 ???z msb first p? r^??b ( figure 53 ) { AK4612 xz??w ! ???b?h|t? y t? \ r`?b{ ??? 8 xz ?c?u \ rb? - e (stop condition) t?lo 4?`?b{ scl ???u ?h? w t sda ???? ?l? t? ?h? tb?qz - eu^???b ( figure 56 ) { AK4612 x :w??w???? st {v?\qupv?b{???? 1 ?? lh?z - e? ?c?t???? ?qz??u ? $t????y??^?zw???xw?? t ^??b{?? ?16h? t???? {v?i?z^?tw??t {v?i ?tx?? ?00h? t???u {v???b{ ???u ? h ? wxz sda ???w y 6x psz?ys??d?{??????u ?h? q ?l? wp y 6?!?pv?wxz scl ???w??? ??u ? l ? wtv???b ( figure 58 ) { scl ???u ? h ? wt sda ????!?b?wxz?? ez - e? ??b?qvw?pb{ sda slave address s s t a r t r/w="0" a c k sub address(n) a c k data(n) a c k data(n+1) a c k a c k data(n+x) a c k p s t o p figure 50. i 2 c t??w??? 8 3?-? 0 0 1 0 0 cad1 cad0 r/w (cad1,cad0 x pin t?? ? ) figure 51. h 1 ??w? r 0 0 0 a4 a3 a2 a1 a0 figure 52. h 2 ??w? r d7 d6 d5 d4 d3 d2 d1 d0 figure 53. h 3 ????w? r [AK4612] ms1039-j-01 2009/06 - 52 - (2)-2. read ?? r/w bit u ?1? w ?z AK4612 x read ?^??m?b{| ^?h??w???u z?^?h?z ?u - e? ?c? y t? \ rb?qz??u ? $t????y??^?zw?? w???? ?? zb\qupv?b{?? ?16h? w???? ?? z`h?z^?tw??? ?? zb ?tx?? ?00h? w???u ?? z^??b{ AK4612 x???????q??????w 2 mw read ????lom?b{ (2)-2-1. ??????? AK4612 x o ?t??????los?z ???????px\w??p| ^?h? ?w???? ?? z`?b{ o ?w????x7?t??`h??ww?? ? ?-?`om?b{?qyz7?t?? (read p? write p? ) `h??u ?n? pk?zfw? ?????????lh ?z?? ?n+1? w???u ?? z^??b{???????p xz AK4612 x read ??w??? (r/w bit = ?1?) w ??t 0`o? y t? \ r`zw??? t? o ?w????p| ^?h???? z?`hwj o ???? 1 m????y??`?bg ???u z?^?h?j?u? y t? \ rdc - e? ?qz read ?^x 4?`?b{ sda slave address s s t a r t r/w="1" a c k a c k data(n+1) a c k data(n+2) a c k a c k data(n+x) n a c k p s t o p data(n) m a s t e r m a s t e r m a s t e r m a s t e r m a s t e r figure 54. ??????? (2)-2-2. ???????? ????????t?? ?w??w???? ?? zb\qupv?b{??????? ?x read ??w??? (r/w bit = ?1?) ? ??b? 2tz???w write ??? ??b? ?auk ??b{????????px7 st?? e? ??`zt write ??w??? (r/w bit = ?0?) z ?? zb??? q ??`?b{ AK4612 u\w?? ??t 0`o? y t? \ r`h?z 6 ez read ??w??? (r/w bit= ?1?) ? ??`?b{ AK4612 x\w???w ? ?t 0`o? y t? \ r`z| ^?h??w???? z?`z o ?????? 1 m???? y??`?b{???u z?^?h?z?u? y t? \ rdc - e? ?qz read ?^x 4? `?b{ sda slave address s s t a r t r/w="0" a c k a c k a c k data(n) a c k data(n+x) a c k p s t o p sub address(n) s slave address r/w="1" s t a r t data(n+1) a c k n a c k m a s t e r m a s t e r m a s t e r m a s t e r figure 55. ???????? [AK4612] ms1039-j-01 2009/06 - 53 - scl sda stop condition start condition s p figure 56. ?? eq - e scl from master acknowledge data output by transmitter data output by receiver 1 9 8 start condition not acknowledge clock pulse for acknowledgement s 2 figure 57. i 2 c pw? y t scl sda data line stable; data valid change of data allowed figure 58. i 2 c pw??? 8 [AK4612] ms1039-j-01 2009/06 - 54 - ?? addr register name d7 d6 d5 d4 d3 d2 d1 d0 00h power management 1 0 0 0 0 pmvr pmadc pmdac rstn 01h power management 2 0 0 0 0 0 pmad3 pmad2 pmad1 02h power management 3 0 0 1 1 pmda4 pmda3 pmda2 pmda1 03h control 1 tdm1 tdm0 dif2 dif1 dif0 ats1 ats0 smute 04h control 2 0 mcko cks1 cks0 dfs1 dfs0 acks div 05h de-emphasis1 dem41 dem40 dem31 dem30 dem21 dem20 dem11 dem10 06h reserved 0 0 0 0 0 1 0 1 07h overflow detect 0 0 0 0 ovfe ovfm2 ovfm1 ovfm0 08h zero detect loop1 loop0 0 0 dzfm3 dzfm2 dzfm1 dzfm0 09h input control 0 0 0 0 0 die3 die2 die1 0ah output control 0 0 1 1 doe4 doe3 doe2 doe1 0bh lout1 volume control att7 att6 att5 att4 att3 att2 att1 att0 0ch rout1 volume control att7 att6 att5 att4 att3 att2 att1 att0 0dh lout2 volume control att7 att6 att5 att4 att3 att2 att1 att0 0eh rout2 volume control att7 att6 att5 att4 att3 att2 att1 att0 0fh lout3 volume control att7 att6 att5 att4 att3 att2 att1 att0 10h rout3 volume control att7 att6 att5 att4 att3 att2 att1 att0 11h lout4 volume control att7 att6 att5 att4 att3 att2 att1 att0 12h rout4 volume control att7 att6 att5 att4 att3 att2 att1 att0 ? : ?? 13h 1fh x {v? ?dpb{ ?0? p| ^?h????w ?1? w {v?xe-pb{ pdn pin ? ?l? tb?qz? ?x s8=^??b{ rstn bit ? ?0? tb?qz o ?w?????u???^?z dzf1-2 pin u ?h? ts??b{ ``z ? ?x s8=^??d?{ [AK4612] ms1039-j-01 2009/06 - 55 - ?i ? addr register name d7 d6 d5 d4 d3 d2 d1 d0 00h power management 1 0 0 0 0 pmvr pmadc pmdac rstn r/w rd rd rd rd r/w r/w r/w r/w default 0 0 0 0 1 1 1 1 rstn: o ????????? 0: ???{ dzf1-2 pin x ?h? ts??buz? ?x s8=^??d?{ 1: ?^{ pmdac: dac1-4 w??y?? 0: ? dac w????{\wqv pmda1-6 bit x?pb{ 1: ?^{\wqv pmda1-6 bit x?pb{ pmadc: adc1-3 w??y?? 0: ? adc w????{\wqv pmad1-3 bit x?pb{ 1: ?^{\wqv pmad1-3 bit x?pb{ pmvr: , j ?yw??y?? 0: ???? 1: ?^ ??? ?^^d? ?xz ?c pmvr bit ? ?1? t`sz?ys??d?{ pmvr bit t 0 `o ?0? ? {v?\qupv?wxz pmdac, pmadc bit ? ?0? tb?izpb{ addr register name d7 d6 d5 d4 d3 d2 d1 d0 01h power management 2 0 0 0 0 0 pmad3 pmad2 pmad1 r/w rd rd rd rd rd r/w r/w r/w default 0 0 0 0 0 1 1 1 pmad3-1: adc1-3 w??y?? (0: ???? , 1: ?^ ) pmad1: adc1 w??y?? pmad2: adc2 w??y?? pmad3: adc3 w??y?? addr register name d7 d6 d5 d4 d3 d2 d1 d0 02h power management 3 0 0 1 1 pmda4 pmda3 pmda2 pmda1 r/w rd rd rd rd r/w r/w r/w r/w default 0 0 1 1 1 1 1 1 pmda4-1: dac1-4 w??y?? (0: ???? , 1: ?^ ) pmda1: dac1 w??y?? pmda2: dac2 w??y?? pmda3: dac3 w??y?? pmda4: dac4 w??y?? [AK4612] ms1039-j-01 2009/06 - 56 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 03h control 1 tdm1 tdm0 dif2 dif1 dif0 ats1 ats0 smute r/w r/w r/w r/w r/w r/w r/w r/w r/w default 0 0 1 0 0 0 0 0 smute: 1?????; ? 0: ?^ 1: ? dac z?u1?????^??b{ ats1-0: ?????a?? -? ? ( table 18 ) s8 ? : ?00?, mode 0 dif2-0: |???|????????t?? ? r ( table 11 , table 12 , table 13 , table 14 ) s8 ? : ?100?, mode 4 tdm1-0: tdm ???? ? r ( table 11 , table 12 , table 13 , table 14 ) mode tdm1 tdm0 sdti sampling speed mode 0 0 0 1-6 stereo mode (normal, double, quad speed mode) 1 0 1 1 tdm512 mode (normal speed mode) 2 1 0 1-2 tdm256 mode (double speed mode) 3 1 1 1-3 tdm128 mode (quad speed mode) addr register name d7 d6 d5 d4 d3 d2 d1 d0 04h control 2 0 mcko cks1 cks0 dfs1 dfs0 acks div r/w rd r/w r/w r/w r/w r/w r/w r/w default 0 0 1 0 0 0 0 0 div: ???? z? * t : ? 0: xti t ??^?h * t :? 1 p z? 1: xti t ??^?h * t :? 1/2 t`o z? acks: ??? ? yyt??? 0: ? , manual setting mode 1: ? , auto setting mode acks= ?1? wqvz mclk * t :x ?u z^??b{\w ? dfs w ? x1^??b{ acks= ?0? wqvz????e??t??x dfs0, 1 p ? `zt??pw mclk * t :x ?u z^??b{ dfs1-0: ????e?????? ( table 1 ) acks bit= ?1? wqvz dfs w ? x1^??b{ cks1-0: ???? ?? * t : ? r ( table 2 ) mcko: ???? z???? 0: mcko pin = ?l? ? z? 1: div bit p ? ^?h * t :? mcko t z? [AK4612] ms1039-j-01 2009/06 - 57 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 05h de-emphasis1 dem41 dem40 dem31 dem30 dem21 dem20 dem11 dem10 r/w r/w r/w r/w r/w r/w r/w r/w r/w default 0 1 0 1 0 1 0 1 dem11-10: dac1 w?????3 t???? ( table 8 ) s8 ? : ?01?, off dem21-20: dac2 w?????3 t???? ( table 8 ) s8 ? : ?01?, off dem31-30: dac3 w?????3 t???? ( table 8 ) s8 ? : ?01?, off dem41-40: dac4 w?????3 t???? ( table 8 ) s8 ? : ?01?, off addr register name d7 d6 d5 d4 d3 d2 d1 d0 07h overflow detect 0 0 0 0 ovfe ovfm2 ovfm1 ovfm0 r/w rd rd rd rd r/w r/w r/w r/w default 0 0 0 0 0 1 1 1 ovfe: |???u z; ? ( table 15 ) 0: |???u z?z?u z? ovf1/dzf1 pin x dzf1 pin qs??b{ ovf2/dzf2 pin x dzf2 pin qs??b{ 1: |???u z?z?u z? ovf1/dzf1 pin x ovf1 pin qs??b{ ovf2/dzf2 pin x ovf2 pin qs??b{ ovfm2-0: |???u zt?? ? r ( table 15 ) s8 ? : ?111?, ? [AK4612] ms1039-j-01 2009/06 - 58 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 08h zero detect loop1 loop0 0 0 dzfm3 dzfm2 dzfm1 dzfm0 r/w r/w r/w rd rd r/w r/w r/w r/w default 0 0 0 0 1 1 1 1 dzfm3-0: ?u zt?? ? r ( table 16 ) s8 ? : ?1111?, ? loop1-0: ????t??? 00: ?^ ( ????s` ) 01: lin1 lout1, lout2 rin1 rout1, rout2 lin2 lout3, lout4 rin2 rout3, rout4 lin3 lout5, lout6 rin3 rout5, rout6 adc w???? z?? dac w???? ??t ? `?b{\wt??px dac ?? w sdti1-4 x1^??b{????t?? sdto w????xz|???|? ???u mode0,1 w ?x mode3 z mode2 w ?x mode5 ts??b{ 10: sdti1(l) sdti2(l), sdti3(l), sdti4(l) sdti1(r) sdti2(r), sdti3(r), sdti4(r) \wt??px dac ??w sdti2-4 x1^??b{ 11: not available tdm t??wqvz?w ? x ?00? t ? `o<^m{ addr register name d7 d6 d5 d4 d3 d2 d1 d0 09h input control 0 0 0 0 0 die3 die2 die1 r/w rd rd rd rd rd r/w r/w r/w default 0 0 0 0 0 1 1 1 die3-1: adc1-3 ) ? ????? (0: single-end input, 1: differential input) die1: adc1 ) ? ????? die2: adc2 ) ? ????? die3: adc3 ) ? ????? addr register name d7 d6 d5 d4 d3 d2 d1 d0 0ah output control 0 0 1 1 doe4 doe3 doe2 doe1 r/w rd rd rd rd r/w r/w r/w r/w default 0 0 1 1 1 1 1 1 doe4-1: dac1-4 ) ? z???? (0: single-end output, 1: differential output) doe1: dac1 ) ? z???? doe2: dac2 ) ? z???? doe3: dac3 ) ? z???? doe4: dac4 ) ? z???? [AK4612] ms1039-j-01 2009/06 - 59 - addr register name d7 d6 d5 d4 d3 d2 d1 d0 0bh lout1 volume control att7 att6 att5 att4 att3 att2 att1 att0 0ch rout1 volume control att7 att6 att5 att4 att3 att2 att1 att0 0dh lout2 volume control att7 att6 att5 att4 att3 att2 att1 att0 0eh rout2 volume control att7 att6 att5 att4 att3 att2 att1 att0 0fh lout3 volume control att7 att6 att5 att4 att3 att2 att1 att0 10h rout3 volume control att7 att6 att5 att4 att3 att2 att1 att0 11h lout4 volume control att7 att6 att5 att4 att3 att2 att1 att0 12h rout4 volume control att7 att6 att5 att4 att3 att2 att1 att0 r/w r/w r/w r/w r/w r/w r/w r/w r/w default 0 0 0 0 0 0 0 0 att7-0: ?a?3???? ( table 17 ) [AK4612] ms1039-j-01 2009/06 - 60 - 3a ?- e) ? ?? (die3-1 bit = ?111?) z) ? z? (doe4-1 bit =?1111? ) 3??????? (i2c pin = ?l?) master mode (m/s pin = ?h?) AK4612 x differential ??px???????????? o `om?b{ AK4612 x differential z?px???????? o `om?d?wp 3????? ??` hm ?x? ?p lpf ? ?pxi^m{ AK4612 lout4+ 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 lout2- rout2+ rout2- lout3+ lout3- rout3+ rout3- vss2 avdd2 vrefh2 lout4-1 rout4+ rout4- tst9 tst10 tst11 tst12 tst13 tst14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 tst4 tst5 cad0 i2c cclk / scl cdti / sda cdto tst1 tst3 nc xto cad1 csn tvdd2 vss3 dvdd mcko m/s tst2 pdn lout2+ 4 0 39 38 3 7 36 35 3 4 33 3 2 3 1 29 2 8 30 27 2 5 24 2 6 2 3 22 21 rout1- rout1+- lout1+ dvmpd lout1- tst8 tst7 sdti4 sdti3 sdti2 bick lrck sdti1 sdto3 sdto2 sdto1 vss4 tvdd1 xti / mclk 6 1 6 2 63 6 4 65 66 6 7 68 69 70 72 7 3 71 74 76 77 7 5 7 8 7 9 80 tst15 tst16 ovf1 / dzf1 lin1- rin1+ rin1- lin2+ lin2- rin2+ lin3+ lin3- rin2- vss1 vrefh1 vcom rin3+ rin3- ovf2 / dzf2 lin1+ a vdd1 mute lpf mute lpf mute lpf mute lpf mute lpf mute lpf mute lpf mute lpf 1.6v to 3.6v digital analog 3.3v analo g 3.3v + 2.2u 0.1u + + + dsp 0.1u 10u 0.1u 10u 10u 0.1u c1 c1 + + 1.6v to 3.6v di g ital 1.8v di g ital core p analo g ground di g ital ground 10u 10u 0.1u 0.1u figure 59. 3a ? ? 1 [AK4612] ms1039-j-01 2009/06 - 61 - e single-end ?? (die3-1 bit = ?000?) z single-end z? (doe4-1 bit =?0000? ) i 2 c ???? (i2c pin = ?h?) slave mode (m/s pin = ?l?) AK4612 x single-end ??px???????????? o `om?b{ AK4612 x single-end z?px???????? o `om?b{ AK4612 lout4 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 lout2- rout2 rout2- lout3 lout3- rout3 rout3- vss2 avdd2 vrefh2 lout4- rout4 rout4- tst9 tst10 tst11 tst12 tst13 tst14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 tst4 tst5 cad0 i2c cclk / scl cdti / sda cdto tst1 tst3 nc xto cad1 csn tvdd2 vss3 dvdd mcko m/s tst2 pdn lout2 4 0 39 38 3 7 36 35 3 4 33 3 2 3 1 29 2 8 30 27 2 5 24 2 6 2 3 22 21 rout1- rout1 lout1 dvmpd lout1- tst8 tst7 sdti4 sdti3 sdti2 bick lrck sdti1 sdto3 sdto2 sdto1 vss4 tvdd1 xti / mclk 6 1 6 2 63 6 4 65 66 6 7 68 69 7 0 72 73 71 74 76 77 7 5 78 7 9 80 tst15 tst16 ovf1 / dzf1 lin1- rin1 rin1- lin2 lin2- rin2 lin3 lin3- rin2- vss1 vrefh1 vcom rin3 rin3- ovf2 / dzf2 lin1 a vdd1 mute mute 1.6v to 3.6v digital analog 3.3v analo g 3.3v + 2.2u 0.1u + + + + + 1.6v to 3.6v di g ital 1.8v di g ital core dsp p analo g ground di g ital ground mute mute mute mute mute mute 10u 0.1u 0.1u 0.1u 10u 10u 0.1u 10u 10u 0.1u figure 60. 3a ? ? 2 [AK4612] ms1039-j-01 2009/06 - 62 - ????q ?ow????? ?oq????w ?mtx g ??`o<^m{ avdd1, avdd2, tvdd1, tvdd2 tx3aw? ?? ?o???`?b{ avdd1, avdd2, tvdd1, tvdd2 u ?op??^?? ?xz ?oqj [3 ?-???q? ?axk??d?{ vss1 q vss2, vss3, vss4 x???????t ? `o<^m{ 3 aw????x???q????p zo `z pc ??? w ?otmq\?p ? `o<^ m{ ?0?w????????xs??x ?oe?wxt ? `o<^m{ , j ?y ?? vrefh1, vrefh2 pin t ??^?? ?yu??? ? z??? ? `?b{ vrefh1 pin x avdd1 pin t ? `z vss1 qwt 0.1 f w???????? ? `?b{ vrefh2 pin x avdd2 pin t ? `z vss2 qwt 0.1 f w???????? ? `?b{ vcom x avdd1x1/2 ?y? z?`os?z?? ? ??wt? ?yq`o????b{\we?tx? * t??? ??b?h?t 2.2 f sw ?r? ??q?t 0.1 f w???????? vss1 qwt ? `o<^m{ ?t??????? xe?t zr?iznzo ? `o<^m{ vcom pin t? ?v? loxmz?d?{?hz???? ??z ?t??? ??x! e+?w????? ?z?h? vrefh1, vrefh2, vcom t?pv?izm `o<^m{ 3. ??? ?? adc ??x3????? ??z) ? ??w?mt 0 `os?z die3-1 bit p ? rpv?b{3???? ? ??x o ?p 9k (typ) p vcom(avdd1x1/2) ?yt??^?om?b{ ???x 0.65 x vrefh1 vpp (typ)@fs=48khz pb{) ? ??x o ?p 13k (typ) p vcom t??^?om?b{ lin(rin)+ q lin(rin) ? w ?? ?? c?xz? 0.65 x vrefh1 vpp (typ)@fs=48khz pb{ AK4612 x vss1 t? avdd1 ?p w ?y? ??b?\qupv?b{ z???w????x 2?s ??y?? (2 w4 : ) pb{ dc |? ??x o w hpf p????^??b{ AK4612 x 128fs(@fs=48khz) p??? ???????`?b{????????xz 128fs w t : ? w 3?? ?x -?? w???b?o ??`?b{ AK4612 x 128fs ?w???n 0^d?h?t? ?????????? (rc ???? ) ? o `om?b{ 4. ??? z? dac z?x3????? z?z) ? z?w?mt 0 `os?z doe4-1 bit p ? rpv?b{3??? ?? z?w z??x vcom ?y? t 0.63xvrefh2 vpp(typ) pb{) ? z?w z??x vcom ?y? t ? 0.63 x vrefh2 vpp (typ) pb{ ) ? z?x? ?pc?^??b{ l(r)out+ q l(r)out- wc? ?yx v aout = [l(r)out+]-[l(r)out-] pb{c????u w ?z z??x 4.16vpp (typ@avdd2=3.3v) pb{? ?c?s?w?? ?yx? ?p??^??b{ ????w???? x 2?s ??y?? (2 w4 : ) pz 7fffffh(@24bit) t 0`ox yw??-??z 800000h(@24bit) t 0`o x ?w??-??z 000000h(@24bit) pwg y ?x vcom ?yu z?^??b{?! e+u c \b? 3? ??? ( 3?e???? ) x3????? z?tx o w??????3????? (scf) q ???? (ctf) p ??^??b{ ) ? z?tx ????u o ^?om?d?wp 3????? ? ?`hm ?x? ?p lpf ? ?pxi^m{ ? lsi w??? z?x vcom ?yt 0`o : mv sw|?????mh? w?;px???p dc r ???`?b{ [AK4612] ms1039-j-01 2009/06 - 63 - 5. ? ???? ??s? \ws?w ????x 4.3vpp (AK4612: typ. 2.15vpp) pb{ 4.3vpp analog in 22 figure 61. input buffer circuit exam ple 1 (dc coupled single-end input) \ws?w ????x 4.3vpp (AK4612: typ. 2.15vpp) pb{ 4.3vpp analog in 22 figure 62. input buffer circuit exam ple 2 (ac coupled single-end input) \ws?w ????x 2.15vpp (AK4612: typ. 2.15vpp) pb{ analog in analog in 2.15vpp 2.15vpp 10 figure 63. input buffer circuit example 3 (ac coupled differential input) [AK4612] ms1039-j-01 2009/06 - 64 - \ws?w ????x 2.15vpp (AK4612: typ. 2.15vpp) pb{ analog in 2.15vpp 10 ain+ ain- AK4612 open figure 64. input buffer circuit exam ple 4 (ac coupled single-end input) 6. ? ???? z?s? \ws?w z???x 4.16vpp (AK4612: typ. 2.08vpp) pb{ 4.7k vp+ = +12v vp- = -12v r1 4.7k aout- AK4612 aout+ 4.16vpp analog out 2.08vpp 2.08vpp vp+ vp- njm5532 470p r1 4.7k 470p 4.7k when r1=200 fc=93.2khz, q=0.712, g=-0.1b at 40khz when r1=180 fc=98.2khz, q=0.681, g=-0.2db at 40khz 3900p 20 20 2200p a b figure 65. output buffer circuit example 1 (dc coupled differential output) \ws?w z???x 4.16vpp (AK4612: typ. 2.08vpp) pb{ 4.7k vp+ = +12v vp- = -12v r1 4.7k aout- AK4612 aout+ 4.16vpp analog out 2.08vpp 2.08vpp vp+ vp- njm5532 470p r1 4.7k 470p 4.7k when r1=180 fc=90.1khz, q=0.735, g=-0.04b at 40khz when r1=150 fc=99.0khz, q=0.680, g=-0.23db at 40khz 3900p 22 22 20 20 2200p a b figure 66. output buffer circuit example 2 (ac coupled differential output) [AK4612] ms1039-j-01 2009/06 - 65 - \ws?w z???x 4.16vpp (AK4612: typ. 2.08vpp) pb{ 4.7k vp+ = +12v vp- = -12v aout- AK4612 aout+ analog out 2.08vpp 4.7k vp+ vp- njm5532 4.16vpp open 10k 22 470p 470p 4.7k 4.7k figure 67. output buffer circuit example 3 (ac coupled single-end output) \ws?w z???x 2.08vpp (AK4612: typ. 2.08vpp) pb{ aout- AK4612 aout+ analog out 2.08vpp 10k 22 2.08vpp open figure 68. output buffer circuit example 4 (ac coupled single-end output) [AK4612] ms1039-j-01 2009/06 - 66 - ?-? z 80-pin lqfp ( unit : mm ) 14.00.2 12.00.2 0.50 1 20 21 40 41 60 61 80 12.00.2 14.00.2 1.25typ 0.08 m 0.125 +0.10 -0.05 0.500.2 1.85max 0.10 +0.15 -0.10 1.400.2 0.10 0.200.1 0 ~ 10 p~y???7 ?-?p : ?3% %z??? ( 7 z ) ??? ?????p : ? ????? rg : r > ( ) y?? [AK4612] ms1039-j-01 2009/06 - 67 - ???? (AK4612eq) AK4612eq xxxxxxx 1) pin #1 indication 2) date code: xxxxxxx(7 digits) 3) marking code: AK4612eq 4) asahi kasei logo ???? (AK4612vq) AK4612vq xxxxxxx 1) pin #1 indication 2) date code: xxxxxxx(7 digits) 3) marking code: AK4612vq 4) asahi kasei logo [AK4612] ms1039-j-01 2009/06 - 68 - ~ do date (yy/mm/dd) revision reason page contents 09/02/06 00 s [ 09/06/05 01 ?7!? 10 ??? ? q adc analog input characteristics (differential) s/(n+d) fs=48khz, -1dbfs: 89 88 (min) oas ??? ? ? {tgl^?h a ?zt|z a ?w?7tmv?`oxz a ?~ 3wh?t'sx!?b?\ quk??b{ hm?`oz]?;?u |wmtxz? {t l`h ?cu7 yw?wpk?\q ?t? r pzk?mxt ?? 3? r pt]? y<^m{ ? ? {t l^?h ?c~ $?w?;ti?`h h~ w tb? ??vz? tvzfw wv bt 0b? ??tmv?`oxz ptxfw y ? ?o?wpxk??d?wpz]? ?<^m{ ? ? {gl a ?uz?? 8t|z?u?got ?? ?t ? ( t??? ) t? pb? ?z zb?mt ?ot,nx z?du ?apb{ ? ??;+z? ? ?z? |;;+zj?? m?;;+srzfw ?~;+w? ?? ?^ ?? uz ??hx ??e?cz \?z .zr? s? o gs ??t?b\qu ' y^??? os??o?m ?t q?a{^??; mtt a ???;^?? ?xz ?c? 2tt e tw {?t?? ???s ?<^m{ ? \w ?? {? ?ct\o`h; mtt a ???;^?h ?ztxzfw?;t? \c? ? sw y ? ~ ?o?wpxk??d?wp]? ?<^m{ ? sl7w 8 st??\w ???w o? ??ct g; mtt a ?u?;^?zfw?;t ? ? su \ah ?x ?osl7to] ? r?hx4 ?`o ?v?bwp]? ?<^m { |
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